参数资料
型号: MAX6722AUTSYD6+T
厂商: MAXIM INTEGRATED PRODUCTS INC
元件分类: 电源管理
英文描述: Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits
中文描述: 3-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO6
封装: LEAD FREE, MO-178AB, SOT-23, 6 PIN
文件页数: 4/43页
文件大小: 948K
代理商: MAX6722AUTSYD6+T
MAX6715A–MAX6729A
Dual/Triple, Ultra-Low-Voltage, SOT23 P
Supervisory Circuits
12
______________________________________________________________________________________
MAX6728A/
MAX6729A
VEXT
R1
R3
R2
PFI
GND
PFO
A
VGOOD = DESIRED VEXT GOOD VOLTAGE THRESHOLD
VFAIL = DESIRED VEXT FAIL VOLTAGE THRESHOLD
VOH = VCC1 (FOR PUSH-PULL PFO)
R2 = 50k
(FOR > 10A R2 CURRENT)
R1 = R2 ((VGOOD - VPFI) - (VPFI)(VGOOD - VFAIL) / VOH) / VPFI
R3 = (R1 x VOH) / (VGOOD - VFAIL)
VGOOD
VFAIL
VIN
PFO
Figure 5. Adding Hysteresis to Power-Fail for Push-Pull PFO
Applications Information
Interfacing to Ps with Bidirectional
Reset Pins
Most Ps with bidirectional reset pins can interface
directly to open-drain RST output options. Systems
simultaneously requiring a push-pull RST output and a
bidirectional reset interface can be in logic contention.
To prevent contention, connect a 4.7k
resistor
between RST and the P’s reset I/O port as shown in
Figure 4.
Adding Hysteresis to the Power-Fail
Comparator
The power-fail comparator has a typical input hysteresis
of 3mV. This is sufficient for most applications where a
power-supply line is being monitored through an external
voltage-divider (see the Power-Fail Comparator section).
If additional noise margin is desired, connect a resistor
between PFO and PFI as shown in Figure 5. Select the
values of R1, R2, and R3 so PFI sees VPFI (626mV) when
VEXT falls to its power-fail trip point (VFAIL) and when VIN
rises to its power-good trip point (VGOOD). The hysteresis
window extends between the specified VFAIL and VGOOD
thresholds. R3 adds the additional hysteresis by sinking
current from the R1/R2 divider network when PFO is logic
low and sourcing current into the network when PFO is
logic high. R3 is typically an order of magnitude greater
than R1 or R2.
The current through R2 should be at least 2.5A to ensure
that the 100nA (max) PFI input current does not signifi-
cantly shift the trip points. Therefore, R2 < VPFI / 10A <
62k
for most applications. R3 will provide additional hys-
teresis for PFO push-pull (VOH = VCC1) or open-drain
(VOH = VPULLUP) applications.
Monitoring an Additional Power Supply
These P supervisors can monitor either positive or
negative supplies using a resistor voltage-divider to
PFI. PFO can be used to generate an interrupt to the P
or cause reset to assert (Figure 3).
Monitoring a Negative Voltage
The power-fail comparator can be used to monitor a
negative supply voltage using the circuit shown in
Figure 3. When the negative supply is valid, PFO is low.
When the negative supply voltage drops, PFO goes
high. The circuit’s accuracy is affected by the PFI
threshold tolerance, VCC, R1, and R2.
Negative-Going VCC Transients
The MAX6715A–MAX6729A supervisors are relatively
immune to short-duration negative-going VCC transients
(glitches). It is usually undesirable to reset the P when
VCC experiences only small glitches. The Typical
Operating Characteristics show Maximum Transient
Duration vs. Reset Threshold Overdrive, for which reset
pulses are not generated. The graph was produced
using negative-going VCC pulses, starting above VTH
and ending below the reset threshold by the magnitude
MAX6715A–
MAX6729A
GND
VCC1VCC2
VCC2
VCC1
RST
RESET TO OTHER SYSTEM COMPONENTS
RESET
P
4.7k
Figure 4. Interfacing to Ps with Bidirectional Reset I/O
相关PDF资料
PDF描述
MAX6722AUTTGD1+T Dual/Triple Ultra-Low-Voltage SOT23 &#181;P Supervisory Circuits
MAX6722AUTTGD2+T Dual/Triple Ultra-Low-Voltage SOT23 &#181;P Supervisory Circuits
MAX6722AUTTGD3+ Dual/Triple Ultra-Low-Voltage SOT23 &#181;P Supervisory Circuits
MAX6722AUTTGD4+T Dual/Triple Ultra-Low-Voltage SOT23 &#181;P Supervisory Circuits
MAX6722AUTTGD5+T Dual/Triple Ultra-Low-Voltage SOT23 &#181;P Supervisory Circuits
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