参数资料
型号: MAX6735AKARVD3+T
厂商: Maxim Integrated Products
文件页数: 7/16页
文件大小: 0K
描述: IC SUPERVISOR MPU W/WD SOT23-8
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 多压监控器
监视电压数目: 3
输出: 推挽式,图腾柱
复位: 低有效
复位超时: 最小为 140 ms
电压 - 阀值: 1.575V,2.625V,可调
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: SOT-23-8
供应商设备封装: SOT-23-8
包装: 带卷 (TR)
Single-/Dual-/Triple-Voltage μP Supervisory
Circuits with Independent Watchdog Output
Pin Description
PIN
MAX6730A
MAX6731A
MAX6732A
MAX6733A
MAX6734A
MAX6735A
NAME
FUNCTION
Active-Low Reset Output. The MAX6730A/MAX6732A/MAX6734A provide an
open-drain output. The MAX6731A/MAX6733A/MAX6735A provide a push-pull
1
1
1
RST
output. RST asserts low when any of the following conditions occur: V CC 1 or
V CC 2 drops below its preset threshold, RSTIN drops below its reset threshold,
or MR is driven low. Open-drain versions require an external pullup resistor.
2
2
2
GND
Ground
Active-Low Watchdog Output. The MAX6730A/MAX6732A/MAX6734A provide
an open-drain WDO output. The MAX6731A/MAX6733A/MAX6735A provide a
push-pull WDO output. WDO asserts low when no low-to-high or high-to-low
3
3
4
WDO
transition occurs on WDI within the watchdog timeout period (t WD ) or if an
undervoltage-lockout condition exists for V CC 1, V CC 2, or RSTIN. WDO
deasserts without a timeout period when V CC 1, V CC 2, and RSTIN exceed their
reset thresholds, or when the manual reset input is deasserted. Open-drain
versions require an external pullup resistor.
Active-Low Manual Reset Input. Drive MR low to force a reset. RST remains
4
5
MR
asserted as long as MR is low and for the reset timeout period after MR releases
high. MR has a 50k ? pullup resistor to V CC 1; leave MR open or connect to
V CC 1 if unused.
Watchdog Input. If WDI remains high or low for longer than the watchdog
timeout period, the internal watchdog timer expires and the watchdog output
asserts low. The internal watchdog timer clears whenever RST asserts or a
5
5
3
WDI
rising or falling edge on WDI is detected. The watchdog has an initial watchdog
timeout period (35s min) after each reset event and a short timeout period
(1.12s min) after the first valid WDI transition. Floating WDI does not disable the
watchdog timer function.
6
6
4
8
6
V CC 1
V CC 2
Primary Supply-Voltage Input. V CC 1 provides power to the device when it is
greater than V CC 2. V CC 1 is the input to the primary reset threshold monitor.
Secondary Supply-Voltage Input. V CC 2 provides power to the device when it is
greater than V CC 1. V CC 2 is the input to the secondary reset threshold monitor.
Undervoltage Reset Comparator Input. RSTIN provides a high-impedance
comparator input for the adjustable reset monitor. RST asserts low if the voltage
7
RSTIN
at RSTIN drops below the 626mV internal reference voltage. Connect a resistive
voltage-divider to RSTIN to monitor voltages higher than 626mV. Connect
RSTIN to V CC 1 or V CC 2 if unused.
_______________________________________________________________________________________
7
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