参数资料
型号: MAX6827SUT+T
厂商: Maxim Integrated Products
文件页数: 8/12页
文件大小: 0K
描述: IC MPU SUPERVISOR SOT23-6
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 多压监控器
监视电压数目: 2
输出: 推挽式,图腾柱
复位: 高有效
复位超时: 最小为 140 ms
电压 - 阀值: 2.93V,可调
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: SOT-23-6
供应商设备封装: SOT-6
包装: 带卷 (TR)
Dual Ultra-Low-Voltage SOT23 μP Supervisors
with Manual Reset and Watchdog Timer
V CC
MAX6829/MAX6830/MAX6831
0.63V
1.26V
RESET TIMEOUT
DELAY GENERATOR
RESET
OR
RESET
V CC2
MR
V CC
WDI
Figure 2. Functional Diagram of V CC2
WATCHDOG
TRANSITION
DETECTOR
WATCHDOG
TIMER
Detailed Description
RESET /RESET Output
A microprocessor’s (μP’s) reset input starts the μP in a
known state. The MAX6826–MAX6831 μP supervisory
circuits assert a reset to prevent code-execution errors
during power-up, power-down, and brownout condi-
asserts a reset. Reset remains asserted while MR is
low, and for the timeout period (140ms min) after it
returns high. MR has an internal 50k ? pullup resistor,
so it can be left open if not used. This input can be dri-
ven with CMOS logic levels or with open-drain/collector
tions. Whenever a monitored voltage falls below the
reset threshold, the reset output asserts low for RESET
V CC
1V
V TH
V TH
1V
and high for RESET. Once all monitored voltages
exceed their reset thresholds, an internal timer keeps
the reset output asserted for the specified reset timeout
RESET
t RP
t RD
period (t RP ); after this interval, reset output returns to its
original state (Figure 3).
Manual Reset Input
Many μP-based products require manual-reset capabil-
RESET
GND
t RP
t RD
ity, allowing the operator, a test technician, or external
logic circuitry to initiate a reset. A logic low on MR
Figure 3. Reset Timing Diagram
8
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