参数资料
型号: MAX6830SHUT+T
厂商: Maxim Integrated Products
文件页数: 6/12页
文件大小: 0K
描述: IC MPU SUPERVISOR SOT23-6
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 多压监控器
监视电压数目: 2
输出: 推挽式,图腾柱
复位: 高有效
复位超时: 最小为 140 ms
电压 - 阀值: 1.313V,2.93V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: SOT-23-6
供应商设备封装: SOT-6
包装: 带卷 (TR)
Dual Ultra-Low-Voltage SOT23 μP Supervisors
with Manual Reset and Watchdog Timer
Typical Operating Characteristics (continued)
(T A = +25°C, unless otherwise noted.)
VOLTAGE OUTPUT LOW vs. I SINK
VOLTAGE OUTPUT HIGH vs. I SOURCE
0.350
0.300
V CC = +2.9V
2.92
2.90
V CC = +2.9V
2.88
0.250
0.200
0.150
0.010
0.005
2.86
2.84
2.82
2.80
2.78
2.76
0
0
1
2
3
4
5
6
7
2.74
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
I SINK (mA)
I SOURCE (mA)
Pin Description
PIN
MAX
6826
MAX
6827
MAX
6828
MAX
6829
MAX
6830
MAX
6831
NAME
FUNCTION
Active-Low Open-Drain or Push-Pull Reset Output. RESET changes from high
to low when V CC1 , V CC2 , or RESET IN input drops below the selected reset
1
1
1
1
RESET
threshold, MR is pulled low, or the watchdog triggers a reset. RESET remains
low for the reset timeout period after all voltages exceed the device reset
threshold, MR goes low to high, or the watchdog triggers a reset.
Active-High Push-Pull Reset Output. RESET changes from low to high when
V CC1 , V CC2 , or RESET IN input drops below the selected reset threshold, MR
1
1
RESET
is pulled low, or the watchdog triggers a reset. RESET remains HIGH for the
reset timeout period after all voltages exceed the device reset threshold, MR
goes low to high, or the watchdog triggers a reset.
2
2
2
2
2
2
GND
Ground
Manual Reset Input, Active-Low, Internal 50k ? pullup to V CC . Pull low to force a
3
3
3
3
3
3
MR
reset. Reset remains active as long as MR is low and for the reset timeout period
after MR goes high. Leave unconnected or connect to V CC , if unused.
Watchdog Input. If WDI remains high or low for longer than the watchdog timeout
period, the internal watchdog timer runs out and a reset is triggered for the reset
4
4
4
4
4
4
WDI
timeout period. The internal watchdog timer clears whenever reset is asserted, the
manual reset is asserted, or WDI sees a rising or falling edge. If WDI is left
unconnected or is connected to a three-stated buffer output, the watchdog feature
is disabled.
6
_______________________________________________________________________________________
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