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| 型号： | MAX6871ETJ+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 34/51页 |
| 文件大小： | 0K |
| 描述： | IC SEQUENCE/SUPERVISOR 32TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 43 |
| 类型： | 序列发生器 |
| 监视电压数目： | 4 |
| 输出： | 开路漏极，推挽式 |
| 复位： | 高有效/低有效 |
| 复位超时： | 可调节/可选择 |
| 电压 - 阀值： | 5 种可调阀值电压 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-WFQFN 裸露焊盘 |
| 供应商设备封装： | 32-TQFN-EP（5x5） |
| 包装： | 管件 |
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EEPROM-Programmable Hex/Quad
Power-Supply Sequencers/Supervisors with ADC
and the master device at clock rates up to 400kHz. Figure
2 shows the interface timing diagram. The
MAX6870/MAX6871 are transmit/receive slave-only
devices, relying upon a master device to generate a
clock signal. The master device (typically a microcon-
troller) initiates data transfer on the bus and generates
SCL to permit that transfer.
A master device communicates to the MAX6870/
MAX6871 by transmitting the proper address followed by
command and/or data words. Each transmit sequence is
framed by a START (S) or REPEATED START (SR) condi-
tion and a STOP (P) condition. Each word transmitted
over the bus is 8 bits long and is always followed by an
acknowledge pulse.
SCL is a logic input, while SDA is a logic input/open-
drain output. SCL and SDA both require external pullup
SDA
resistors to generate the logic-high voltage. Use 4.7k ?
for most applications.
Bit Transfer
Each clock pulse transfers one data bit. The data on
SDA must remain stable while SCL is high (Figure 3),
otherwise the MAX6870/MAX6871 register a START or
STOP condition (Figure 4) from the master. SDA and
SCL idle high when the bus is not busy.
Start and Stop Conditions
Both SCL and SDA idle high when the bus is not busy. A
master device signals the beginning of a transmission
with a START (S) condition (Figure 4) by transitioning
SDA from high to low while SCL is high. The master
device issues a STOP (P) condition (Figure 4) by transi-
tioning SDA from low to high while SCL is high. A STOP
t SU:DAT
t SU:STA
t BUF
t LOW
t HD:DAT
t HD:STA
t SU:STO
SCL
t HIGH
t HD:STA
t R
t F
START
CONDITION
REPEATED START
CONDITION
STOP
CONDITION
START
CONDITION
Figure 2. Serial-Interface Timing Details
SDA
SDA
SCL
SCL
S
P
DATA LINE STABLE,
DATA VALID
Figure 3. Bit Transfer
CHANGE OF
DATA ALLOWED
START
CONDITION
Figure 4. Start and Stop Conditions
STOP
CONDITION
34
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX6871ETJ+ | 功能描述:监控电路 EEPROM-Prog Quad Power-Sup Sequencer RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| MAX6871ETJ+T | 功能描述:监控电路 EEPROM-Prog Quad Power-Sup Sequencer RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| MAX6871ETJ-T | 功能描述:监控电路 RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| MAX6872ETJ | 功能描述:监控电路 RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| MAX6872ETJ+ | 功能描述:监控电路 EEPROM-Prog Hex Power-Sup Sequencer RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
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