参数资料
型号: MAX6895AALT-T
厂商: MAXIM INTEGRATED PRODUCTS INC
元件分类: 电源管理
英文描述: Ultra-Small, Adjustable Sequencing/Supervisory Circuits
中文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO6
封装: 1.50 X 1 MM, 0.80 MM HEIGHT, MICRO, DFN-6
文件页数: 9/13页
文件大小: 266K
代理商: MAX6895AALT-T
MAX6895–MAX6898
Ultra-Small, Adjustable
Sequencing/Supervisory Circuits
_______________________________________________________________________________________
5
Pin Description
PIN
MAX6895/
MAX6897
MAX6896/
MAX6898
NAME
FUNCTION
1—
ENABLE
Active-High Logic-Enable Input. Drive ENABLE low to immediately deassert the output to its
false state (OUT = low or OUT = high) independent of VIN. With VIN above VTH, drive
ENABLE high to assert the output to its true state (OUT = high or OUT = low) after the
adjustable delay period (MAX689_A) or a 150ns propagation delay (MAX689_P).
—1
ENABLE
Active-Low Logic-Enable Input. Drive ENABLE high to immediately deassert the output to its
false state (OUT = low or OUT = high) independent of VIN. With VIN above VTH, drive
ENABLE low to assert the output to its true state (OUT = high or OUT = low) after the
adjustable delay period (MAX689_A) or a 150ns propagation delay (MAX689_P).
22
GND
Ground
33
IN
High-Impedance Monitor Input. Connect IN to an external resistive divider to set the desired
monitored threshold. The output changes state when VIN rises above 0.5V and when VIN falls
below 0.495V.
4—
OUT
Active-High Sequencer/Monitor Output, Push-Pull (MAX6895) or Open-Drain (MAX6897).
OUT is asserted to its true state (OUT = high) when VIN is above VTH and the enable input is
in its true state (ENABLE = high or ENABLE = low) for the capacitor-adjusted delay period.
OUT is deasserted to its false state (OUT = low) immediately after VIN drops below VTH - 5mV
or the enable input is in its false state (ENABLE = low or ENABLE = high). The open-drain
version requires an external pullup resistor.
—4
OUT
Active-Low Sequencer/Monitor Output, Push-Pull (MAX6896) or Open-Drain (MAX6898). OUT
is asserted to its true state (OUT = low) when VIN is above VTH and the enable input is in its
true state (ENABLE = high or ENABLE = low) for the CDELAY adjusted timeout period. OUT
is deasserted to its false state (OUT = high) immediately after VIN drops below VTH - 5mV or
the enable input is in its false state (ENABLE = low or ENABLE = high). The open-drain
version requires an external pullup resistor.
55
CDELAY
Capacitor-Adjustable Delay. Connect an external capacitor (CCDELAY) from CDELAY to GND
to set the IN to OUT (and ENABLE to OUT or ENABLE to OUT for A version devices) delay
period. tDELAY = (CCDELAY x 4.0 x 10
6) + 40s. There is a fixed short delay (40s, typ) for the
output deasserting when VIN falls below VTH.
66
VCC
Supply Voltage Input. Connect a 1.5V to 5.5V supply to VCC to power the device. For noisy
systems, bypass with a 0.1F ceramic capacitor to GND.
相关PDF资料
PDF描述
MAX6895PALT-T Ultra-Small, Adjustable Sequencing/Supervisory Circuits
MAX6896AALT-T Ultra-Small, Adjustable Sequencing/Supervisory Circuits
MAX6896PALT-T Ultra-Small, Adjustable Sequencing/Supervisory Circuits
MAX6897AALT-T Ultra-Small, Adjustable Sequencing/Supervisory Circuits
MAX6897PALT-T Ultra-Small, Adjustable Sequencing/Supervisory Circuits
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