参数资料
型号: MAX690AESA+T
厂商: Maxim Integrated Products
文件页数: 9/12页
文件大小: 0K
描述: IC SUPERVISOR MPU 8-SOIC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 备用电池电路
监视电压数目: 1
输出: 推挽式,图腾柱
复位: 低有效
复位超时: 最小为 140 ms
电压 - 阀值: 4.65V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 带卷 (TR)
Microprocessor Supervisory Circuits
no additional circuitry (see the Typical Operating Circuit ).
accumulates leakage
charge
and
triggers
However, batteries with open-circuit voltages that are
greater cannot be used for backup, as current is sourced
into the substrate through the diode (D1 in Figure 3) when
V CC is close to the reset threshold.
Operation
Without a Backup Power Source
If a backup power source is not used, ground V BATT
and connect V OUT to V CC . Since there is no need to
switch over to any backup power source, V OUT does
not need to be switched. A direct connection to V CC
eliminates any voltage drops across the switch which
may push V OUT below V CC .
Replacing the Backup Battery
The backup battery can be removed while V CC remains
valid, without danger of triggering RESET/ RESET . As
long as V CC stays above the reset threshold, battery-
backup mode cannot be entered. In other switchover
ICs where battery-backup mode is entered whenever
V BATT gets close to V CC , an unconnected V BATT pin
+5V
RESET/ RESET in error.
Adding Hysteresis to the
Power-Fail Comparator
Hysteresis adds a noise margin to the power-fail com-
parator and prevents repeated triggering of PFO when
V IN is close to its trip point. Figure 6 shows how to add
hysteresis to the power-fail comparator. Select the
ratio of R 1 and R 2 such that PFI sees 1.25V when V IN
falls to its trip point (V TRIP ). R 3 adds the hysteresis. It
will typically be an order of magnitude greater than R 1
or R 2 (about 10 times either R 1 or R 2 ). The current
through R 1 and R 2 should be at least 1μA to ensure
that the 25nA (max) PFI input current does not shift the
trip point. R 3 should be larger than 10k ? so it does not
load down the PFO pin. Capacitor C1 adds additional
noise rejection.
Monitoring a Negative Voltage
The power-fail comparator can be used to monitor a
negative supply rail using the circuit of Figure 7. When
the negative rail is good (a negative voltage of large
magnitude), PFO is low. When the negative rail is
degraded (a negative voltage of lesser magnitude),
R 1
V CC
PFO goes high. This circuit’s accuracy is affected by
the PFI threshold tolerance, the V CC line, and the resis-
tors.
R 2
PFI
MAX690A
MAX692A
MAX802L
MAX802M
MAX805L
PFO
Interfacing to μPs with
Bidirectional Reset Pins
μPs with bidirectional reset pins, such as the Motorola
68HC11 series, can contend with the
MAX690A/MAX692A/MAX802L/MAX802M RESET out-
+5V
PFO
0V
V-
V TRIP
V-
GND
0V
put. If, for example, the RESET output is driven high
and the μP wants to pull it low, indeterminate logic lev-
els may result. To correct this, connect a 4.7k ? resis-
tor between the RESET output and the μP reset I/O, as
in Figure 8. Buffer the RESET output to other system
components
=
5 ? 1.25 1.25 - VTRIP
R1 R2
NOTE: V TRIP IS NEGATIVE
Figure 7. Monitoring a Negative Voltage
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