参数资料
型号: MAX6931AUI+T
厂商: Maxim Integrated
文件页数: 8/13页
文件大小: 0K
描述: IC SRL-INTF VFD TUBE DVR 28TSSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
显示器类型: 真空荧光 (VF)
接口: 4 线串行
电流 - 电源: 1.65mA
电源电压: 8 V ~ 76 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 28-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 28-TSSOP
包装: 带卷 (TR)
20-Output, 76V, Serial-Interfaced
VFD Tube Drivers
t CSW
LOAD
t CL
t CH
t CP
t CSH
CLK
t DH
t DS
DIN
D19
D18
D1
D0
t DO
DOUT
Figure 4. 4-Wire Serial Interface Timing Diagram
Table 1. 4-Wire Serial Interface Truth Table
D19
DATA
SERIAL CLOCK SHIFT REGISTER CONTENTS LOAD
INPUT INPUT
LATCH CONTENTS
BLANKING
INPUT
OUTPUT CONTENTS
INPUT
DIN
CLK D0 D1 D2 … Dn-1 Dn LOAD D0 D1 D2 … Dn-1 Dn BLANK D0 D1 D2 … Dn-1 Dn
H
L
H
L
R0 R1 … Rn-2 Rn-1
R0 R1 … Rn-2 Rn-1
X
R0
R1 R2 … Rn-1
Rn
X
X
X
X
X
L
R0 R1 R2
… Rn-1 Rn
P0
P1
P2 … Pn-1
Pn
H
P0
X
P1
X
P2
X
… Pn-1 Pn
X
X
L
H
P0
L
P1 P2
L
L
Pn-1
L
Pn
L
L = Low logic level.
H = High logic level.
X = Don’t care.
P = Present state (shift register).
R = Previous state (latched).
Writing Device Registers Using the
4-Wire Serial Interface
The MAX6921/MAX6931 are normally written using the
following sequence:
1) Take CLK low.
2) Clock 20 bits of data in order D19 first to D0 last
into DIN, observing the data setup and hold times.
3) Load the 20 output latches with a falling edge
on LOAD.
LOAD can be high or low during a transmission. If
LOAD is high, then the data shifted into the shift regis-
ter at DIN appear at the OUT0 to OUT19 outputs.
CLK and DIN can be used to transmit data to other
peripherals. Activity on CLK always shifts data into the
MAX6921/MAX6931s ’ shift register. However, the
MAX6921/MAX6931 only update their output latch on
the rising edge of LOAD, and the last 20 bits of data
are loaded. Therefore, multiple devices can share CLK
and DIN, as long as they have unique LOAD controls.
Determining Driver Output Voltage Drop
The outputs are CMOS drivers, and have a resistive
characteristic. The typical and maximum sink and
source output resistances can be calculated from the
V H and V L electrical characteristics. Use this calculated
resistance to determine the output voltage drop at dif-
ferent output currents.
8
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