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| 型号： | MAX693AESE+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 13/17页 |
| 文件大小： | 0K |
| 描述： | IC SUPERVISOR MPU 16-SOIC |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 备用电池电路 |
| 监视电压数目： | 1 |
| 输出： | 推挽式，推挽式 |
| 复位： | 高有效/低有效 |
| 复位超时： | 最小为 140 ms |
| 电压 - 阀值： | 4.4V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SOIC |
| 包装： | 带卷 (TR) |
Microprocessor Supervisory Circuits
Rp*
CE
V IN
+5V
V OUT
CE
RAM 1
R1
C1*
V CC
CE IN
CE OUT
PFI
MAX691A
MAX693A
MAX800L
CE
CE
RAM 2
R2
R3
MAX691A
MAX693A
MAX800L
MAX800M
MAX800M
CE
PFO
GND
CE
CE
CE
RAM 3
RAM 4
5V
PFO
TO μ P
GND
*OPTIONAL
0V
0V
V L V TRIP V H
V IN
V TRIP = 1.25
V H = 1.25/
*MAXIMUM Rp VALUE DEPENDS ON
THE NUMBER OF RAMS.
MINIMUM Rp VALUE IS 1k Ω.
ACTIVE-HIGH
CE LINES
FROM LOGIC
R1 + R2
R2
R2 I I R3
R1 + R2 I I R3
V L - 1.25 + 5 - 1.25 = 1.25
R1 R3 R2
Figure 10. Alternate CE Gating
Using Separate Power Supplies
Figure 11. Adding Hysteresis to the Power-Fail Comparator
for VBATT and V CC
If using separate power supplies for V CC and VBATT,
VBATT must be less than 0.3V above V CC when V CC is
above the reset threshold. As described in the previ-
ous section, if VBATT exceeds this limit and power is
lost at V CC , current flows continuously from VBATT to
V CC via the VBATT-to-V OUT diode and the V OUT -to-V CC
switch until the circuit is broken (Figure 8).
+5V
R1
PFI
V CC
MAX691A
MAX693A
PFO
nect CE IN to ground, pull up CE OUT to V OUT , and
connect CE OUT to the CE input of each memory
Alternate Chip-Enable Gating
Using memory devices with both CE and CE inputs
allows the CE loop to be bypassed. To do this, con-
–
device (Figure 10). The CE input of each part then
5V
PFO
R2
V-
MAX800L
MAX800M
GND
connects directly to the chip-select logic, which does
not have to be gated.
Adding Hysteresis to the
Power-Fail Comparator
0V
5 - 1.25 = 1.25 - V TRIP
R1 R2
V TRIP
V-
0V
Hysteresis adds a noise margin to the power-fail com-
parator and prevents repeated triggering of PFO when
V IN is near the power-fail comparator trip point. Figure
11 shows how to add hysteresis to the power-fail com-
NOTE : V TRIP IS NEGATIVE.
Figure 12. Monitoring a Negative Voltage
______________________________________________________________________________________
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX693AEUE | 功能描述:监控电路 RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| MAX693AEUE+ | 功能描述:监控电路 MPU Supervisor RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| MAX693AEUE+T | 功能描述:监控电路 MPU Supervisor RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| MAX693AEUE-T | 功能描述:监控电路 RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| MAX693AEWE | 功能描述:监控电路 RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
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