参数资料
型号: MAX6947ATE+
厂商: Maxim Integrated
文件页数: 17/24页
文件大小: 0K
描述: IC LED DRIVER LINEAR 16-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 100
恒定电流:
拓扑: 开路漏极,PWM
输出数: 10
内部驱动器:
类型 - 主要: 背光
类型 - 次要: RGB,白色 LED
频率: 400kHz
电源电压: 2.25 V ~ 3.6 V
输出电压: 7V
安装类型: 表面贴装
封装/外壳: 16-WFQFN 裸露焊盘
供应商设备封装: 16-TQFN(3x3)
包装: 管件
工作温度: -40°C ~ 125°C
10-Port, Constant-Current LED Driver and
I/O Expander with PWM Intensity Control
Table 10. MAX6946/MAX6947 Slave
Addresses
SDA
MAX6947
SLAVE ADDRESS
AD0 = GND
010 0000
SCL
S
P
AD0 = V DD
MAX6946
010 0100
010 0000
START
CONDITION
STOP
CONDITION
Start and Stop Conditions
Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis-
sion with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master fin-
ishes communicating with the slave, it issues a STOP
(P) condition by transitioning SDA from low to high
while SCL is high. The bus is then free for another
transmission (Figure 9).
Bit Transfer
One data bit is transferred during each clock pulse.
The data on SDA must remain stable while SCL is high
(Figure 10).
Acknowledge
Figure 9. Start and Stop Conditions
SDA
SCL
DATA LINE STABLE; CHANGE OF DATA
DATA VALID ALLOWED
Figure 10. Bit Transfer
Any bytes received after the command byte are data
bytes. The first data byte goes into the internal register
of the MAX6946/MAX6947 selected by the command
START
CONDITION
CLOCK PULSE
FOR ACKNOWLEDGE
byte (Figure 11). If multiple data bytes are transmitted
SCL
1
2
8
9
before a STOP condition is detected, these bytes are
generally stored in subsequent MAX6946/MAX6947
SDA BY
TRANSMITTER
internal registers because the command byte autoin-
crements (Table 1).
SDA BY
RECEIVER
S
Message Format for Reading
Read from the MAX6946/MAX6947 using the
MAX6946/MAX6947s’ internally stored command byte
as an address pointer the same way the stored com-
mand byte is used as an address pointer for a write.
The pointer autoincrements after each data byte is read
using the same rules as for a write (Table 1). Thus, a
read is initiated by first configuring the MAX6946/
MAX6947s ’ command byte by performing a write
(Figures 12 and 13). The master can now read n con-
Figure 11. Acknowledge
secutive bytes from the MAX6946/MAX6947 with the
first data byte being read from the register addressed
by the initialized command byte (Figure 14). When per-
forming read-after-write verification, remember to reset
the command byte’s address because the stored com-
mand byte address has been autoincremented after
the write (Table 1).
______________________________________________________________________________________
17
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