参数资料
型号: MAX6956ATL+
厂商: Maxim Integrated
文件页数: 8/24页
文件大小: 0K
描述: IC DRVR DSPL LED 40-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
显示器类型: LED
接口: I²C
电流 - 电源: 180µA
电源电压: 2.5 V ~ 5.5 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 40-WFQFN 裸露焊盘
供应商设备封装: 40-TQFN-EP(6x6)
包装: 管件
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port LED Display Driver and I/O Expander
SDA
t BUF
t SU, DAT
t SU, STA
t LOW
t HD, DAT
t HD, STA
t SU, STO
SCL
t HIGH
t HD, STA
t R
t F
START CONDITION
REPEATED START CONDITION
STOP CONDITION
START CONDITION
Figure 2. 2-Wire Serial Interface Timing Details
SDA
SCL
S
START
CONDITION
P
STOP
CONDITION
Figure 3. Standard Stop Conditions
SDA
SCL
DATA LINE STABLE;
DATA VALID
Figure 4. Bit Transfer
has finished communicating with the slave, it issues a
STOP (P) condition by transitioning SDA from low to
high while SCL is high. The bus is then free for another
transmission (Figure 3).
Bit Transfer
One data bit is transferred during each clock pulse.
The data on SDA must remain stable while SCL is high
(Figure 4).
CHANGE OF DATA ALLOWED
Acknowledge
The acknowledge bit is a clocked 9th bit, which the
recipient uses to handshake receipt of each byte of
data (Figure 5). Thus, each byte transferred effectively
requires 9 bits. The master generates the 9th clock
pulse, and the recipient pulls down SDA during the
acknowledge clock pulse, such that the SDA line is sta-
ble low during the high period of the clock pulse. When
the master is transmitting to the MAX6956, the
MAX6956 generates the acknowledge bit because the
8
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