参数资料
型号: MAX6961ATH+
厂商: Maxim Integrated
文件页数: 17/34页
文件大小: 0K
描述: IC DRVR LED 8X8 44-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 43
显示器类型: LED
配置: 8 x 8(矩阵)
接口: 4 线串行
数字或字符: 任何数字类型
电流 - 电源: 7.5mA
电源电压: 2.7 V ~ 3.6 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 44-WFQFN 裸露焊盘
供应商设备封装: 44-TQFN-EP(7x7)
包装: 管件
MAX6960–MAX6963
4-Wire Serially Interfaced
8 x 8 Matrix Graphic LED Drivers
Table 12. Power-Up Configuration
REGISTER FUNCTION
Driver address (read only)
POWER-UP CONDITION
Address 0
ADDRESS
CODE (HEX)
0x00
D7
0
D6
0
REGISTER DATA
D5 D4 D3 D2
0 0 0 0
D1
0
D0
0
Pixel intensity scale
Panel intensity
Digit 0 intensity
Digit 1 intensity
Fault
Global driver indirect address
Global display indirect address
LSB
Arithmetic for red and green
128/256 intensity
Full 255/256
Full 255/256
No faults
Address 0x00
0x01
0x02
0x03
0x04
0x05
0x08
0x09
X
1
1
1
0
0
0
X
0
1
1
X
0
0
X
0
1
1
X
0
0
X
0
1
1
X
0
0
X
0
1
1
X
0
0
X
0
1
1
X
0
0
0
0
1
1
0
0
0
0
0
1
1
0
0
0
Address 0x0000
Global display indirect address
MSB
0x0A
X
X
0
0
0
0
0
0
Global plane counter
Manual selection to plane 0
0x0B
0
0
0
0
0
0
0
0
Shutdown mode,
ripple sync enabled,
Global panel configuration
mux flip enabled,
color is mono,
0x0D
0
0
1
1
X
X
X
0
4 display planes/1 bit per
pixel
Global driver devices
Global driver rows
256 drivers interconnected
256 drivers in a row
0x0E
0x0F
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
*When reading from the global registers, only the master MAX6960 (whose driver address is 0x00) responds.
Table 13. Global Driver Devices Format
REGISTER
Global driver devices
ADDRESS
CODE (HEX)
0x0E
D7
MS
REGISTER DATA
D6 D5 D4 D3 D2 D1
8-bit global driver devices 0x00 to 0xFF
D0
LSB
Table 14. Global Driver Rows Format
REGISTER
Global driver rows
ADDRESS
CODE (HEX)
0x0F
D7
MSB
REGISTER DATA
D6 D5 D4 D3 D2 D1
8-bit global driver rows 0x00 to 0xFF
D0
LSB
This allows the host to set up one or more registers in
consecutive MAX6960s with the display indirect address,
autoincrementing only when required (Table 10).
Driver Address Register
Reading the driver address register (Table 11) returns
the driver address that has been assigned to a particu-
lar MAX6960. The order of the driver addresses is
determined purely by the order that the 3-wire interface
Maxim Integrated
is daisy-chained through multiple MAX6960s. The reg-
ister is used to detect the presence of a MAX6960 at an
address, and a binary search on the 256 possible
addresses can be used to determine the size of an
array of MAX6960s.
17
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