参数资料
型号: MAX706CUA+T
厂商: Maxim Integrated Products
文件页数: 7/12页
文件大小: 0K
描述: IC SUPERVISOR MPU 8-UMAX
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 简单复位/加电复位
监视电压数目: 1
输出: 推挽式,图腾柱
复位: 低有效
复位超时: 最小为 140 ms
电压 - 阀值: 4.4V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 8-TSSOP,8-MSOP(0.118",3.00mm 宽)
供应商设备封装: 8-uMAX
包装: 带卷 (TR)
MAX705–MAX708/MAX813L
Low-Cost, μP Supervisory Circuits
Power-Fail Comparator
The power-fail comparator can be used for various pur-
poses because its output and noninverting input are
not internally connected. The inverting input is internal-
ly connected to a 1.25V reference.
To build an early-warning circuit for power failure, con-
nect the PFI pin to a voltage divider (see Typical
Operating Circuit). Choose the voltage divider ratio so
that the voltage at PFI falls below 1.25V just before the
+5V regulator drops out. Use PFO to interrupt the μP
so it can prepare for an orderly power-down.
WDI
WDO
+5V
0V
+5V
0V
t WP
t WD
t WD
t WD
__________Applications Information
Ensuring a Valid RESET
Output Down to V CC = 0V
When V CC falls below 1V, the MAX705-MAX708 RESET
output no longer sinks current—it becomes an open cir-
cuit. High-impedance CMOS logic inputs can drift to
undetermined voltages if left undriven. If a pull-down
resistor is added to the RESET pin as shown in Figure 5,
+5V
any stray charge or leakage currents will be drained to
RESET
(RESET)
0V
+5V
0V
RESET EXTERNALLY
TRIGGERED BY MR
t RS
ground, holding RESET low. Resistor value (R1) is not
critical. It should be about 100k ? , large enough not to
load RESET and small enough to pull RESET to ground.
Monitoring Voltages Other Than the
Unregulated DC Input
( ) ARE FOR MAX813L ONLY.
Figure 3. MAX705/MAX706/MAX813L Watchdog Timing
Monitor voltages other than the unregulated DC by
connecting a voltage divider to PFI and adjusting the
ratio appropriately. If required, add hysteresis by con-
necting a resistor (with a value approximately 10 times
the sum of the two resistors in the potential divider net-
work) between PFI and PFO . A capacitor between PFI
and GND will reduce the power-fail circuit’s sensitivity
to high-frequency noise on the line being monitored.
V CC
V RT
V RT
t RS
t RS
RESET can be asserted on other voltages in addition to
the +5V V CC line. Connect PFO to MR to initiate a RESET
pulse when PFI drops below 1.25V. Figure 6 shows the
MAX705-MAX708 configured to assert RESET when the
+5V
RESET
0V
+5V
MR
+5V supply falls below the reset threshold, or when the
+12V supply falls below approximately 11V.
Monitoring a Negative Voltage
The power-fail comparator can also monitor a negative
supply rail (Figure 7). When the negative rail is good (a
negative voltage of large magnitude), PFO is low, and
WDO
0V
+5V
0V
t MD
t MR
MR EXTERNALLY DRIVEN LOW
when the negative rail is degraded (a negative voltage
of lesser magnitude), PFO is high. By adding the resis-
tors and transistor as shown, a high PFO triggers reset.
As long as PFO remains high, the MAX705-
MAX708/MAX813L will keep reset asserted ( RESET =
low, RESET = high). Note that this circuit’s accuracy
depends on the PFI threshold tolerance, the V CC line,
and the resistors.
Figure 4. MAX705/MAX706 RESET, MR , and WDO Timing with
WDI Three-Stated. The MAX707/MAX708/MAX813L RESET
output is the inverse of RESET shown.
Maxim Integrated
7
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