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参数资料
| 型号： | MAX7323ATE+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 15/17页 |
| 文件大小： | 0K |
| 描述： | IC I/O EXPANDER I2C 4B 16TQFN-EP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 接口： | I²C |
| 输入/输出数： | 4 |
| 中断输出： | 是 |
| 频率 - 时钟： | 400kHz |
| 电源电压： | 1.71 V ~ 5.5 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-WFQFN 裸露焊盘 |
| 供应商设备封装： | 16-TQFN-EP（3x3） |
| 包装： | 带卷 (TR) |
| 包括： | POR |
Slave Address and Input Pullup Selection
Address inputs AD0 and AD2 determine the MAX7323
slave address, select which inputs have pullup resis-
tors, and set the default logic state on outputs. Pullups
are enabled on the input ports in groups of two (see
Table 3). The MAX7319, MAX7321, MAX7322, and
MAX7323 use a different range of slave addresses
(110xxxx) than the MAX7320 (101xxxx).
The MAX7323 slave address is determined on each I2C
transmission, regardless of whether the transmission is
actually addressing the MAX7323. The MAX7323 distin-
guishes whether address inputs AD2 and AD0 are con-
nected to SDA or SCL instead of fixed logic levels V+ or
GND during this transmission. Therefore, the MAX7323
slave address can be configured dynamically in the
application without cycling the device supply.
On initial power-up, the MAX7323 cannot decode
address inputs AD2 and AD0 fully until the first I2C
transmission. AD0 and AD2 initially appear to be con-
nected to V+ or GND. This is important because the
address selection determines the power-up default
states of the output ports and I/O port initial logic state,
and whether pullups are enabled. However, at power-
up, the I2C SDA and SCL bus interface lines are high
impedance at the pins of every device (master or slave)
connected to the bus, including the MAX7323. This is
guaranteed as part of the I2C specification. Therefore,
address inputs AD2 and AD0 that are connected to
SDA or SCL normally appear at power-up to be con-
nected to V+. The pullup selection logic uses AD0 to
select whether pullups are enabled for ports P2 and P3,
and to set the initial logic state for O0 and O1. AD2
selects whether pullups are enabled for ports P4 and
P5 and sets the initial logic state for O6 and O7. The
rule is that a logic-high, SDA, or SCL connection
selects the pullups and sets the default logic state to
high. A logic-low deselects the pullups and sets the
default logic state low (see Table 3). The port configu-
ration is correct on power-up for a standard I2C config-
uration, where SDA or SCL are pulled up to V+ by the
external I2C pullup resistors.
There are circumstances where the assumption that
SDA = SCL = V+ on power-up is not true—for example,
in applications in which there is legitimate bus activity
during power-up. Also, if SDA and SCL are terminated
with pullup resistors to a different supply voltage than
the MAX7323’s supply voltage, and if that pullup supply
rises later than the MAX7323’s supply, then SDA or SCL
may appear at power-up to be connected to GND. In
such applications, use the four address combinations
that are selected by connecting address inputs AD2
MAX7323
I2C Port Expander with 4 Push-Pull Outputs
and 4 Open-Drain I/Os
_______________________________________________________________________________________
7
PART
I2C SLAVE
ADDRESS
INPUTS
INTERRUPT
MASK
OPEN-
DRAIN
OUTPUTS
PUSH-
PULL
OUTPUTS
I2C DATA WRITE
I2C DATA READ
MAX7319
110xxxx
8
Yes
—
<I7–I0 interrupt
mask>
<I7–I0 port inputs>
<I7–I0 transition flags>
MAX7320
101xxxx
—
8
<O7–O0 port
outputs>
<O7-O0 port inputs>
MAX7321
110xxxx
Up to 8
—
Up to 8
—
<P7–P0 port
outputs>
<P7–P0 port inputs>
<P7–P0 transition flags>
MAX7322
110xxxx
4
Yes
—
4
<O7, O6 outputs,
I5–I2 interrupt
mask, O1, O0
outputs>
<O7, O6, I5–I2, O1, O0 port
inputs>
<0, 0, I5–I2 transition flags,
0, 0>
MAX7323
110xxxx
Up to 4
—
Up to 4
4
<port outputs>
<O7, O6, P5–P2, O1, O0 port
inputs>
<0, 0, P5–P2 transition flags,
0, 0>
MAX7328
0100xxx
Up to 8
—
Up to 8
—
<P7–P0 port
outputs>
<P7–P0 port inputs>
MAX7329
0111xxx
Up to 8
—
Up to 8
—
<P7–P0 port
outputs>
<P7–P0 port inputs>
Table 2. Read and Write Access to Eight-Port Expander Family
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| MAX7325AEG+T | IC I/O EXPANDER I2C 8B 24QSOP |
| MAX7326AEG+ | IC I/O EXPANDER I2C 16B 24QSOP |
| MAX7329AWE+T | IC I/O EXPANDER I2C 8B 16SOIC |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX7324 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:I2C Port Expander with Eight Push-Pull Outputs and Eight Inputs |
| MAX7324AEG | 功能描述:接口-I/O扩展器 I2C Port Expander w/8 P-P Out & 8 In RoHS:否 制造商:NXP Semiconductors 逻辑系列: 输入/输出端数量: 最大工作频率:100 kHz 工作电源电压:1.65 V to 5.5 V 工作温度范围:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体:HVQFN-16 封装:Reel |
| MAX7324AEG+ | 功能描述:接口-I/O扩展器 I2C Port Expander w/8 P-P Out & 8 In RoHS:否 制造商:NXP Semiconductors 逻辑系列: 输入/输出端数量: 最大工作频率:100 kHz 工作电源电压:1.65 V to 5.5 V 工作温度范围:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体:HVQFN-16 封装:Reel |
| MAX7324AEG+T | 功能描述:接口-I/O扩展器 I2C Port Expander w/8 P-P Out & 8 In RoHS:否 制造商:NXP Semiconductors 逻辑系列: 输入/输出端数量: 最大工作频率:100 kHz 工作电源电压:1.65 V to 5.5 V 工作温度范围:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体:HVQFN-16 封装:Reel |
| MAX7324AEG-T | 功能描述:接口-I/O扩展器 I2C Port Expander w/8 P-P Out & 8 In RoHS:否 制造商:NXP Semiconductors 逻辑系列: 输入/输出端数量: 最大工作频率:100 kHz 工作电源电压:1.65 V to 5.5 V 工作温度范围:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体:HVQFN-16 封装:Reel |
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