参数资料
型号: MAX7428EKA+T
厂商: Maxim Integrated Products
文件页数: 5/21页
文件大小: 0K
描述: IC FILTER BUFFER VID SOT23-8
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 视频滤波器
应用: 录音机,机顶盒
安装类型: 表面贴装
封装/外壳: SOT-23-8
供应商设备封装: SOT-23-8
包装: 带卷 (TR)
MAX7428/MAX7430/MAX7432A
Standard Definition Video Reconstruction
Filters and Buffers
______________________________________________________________________________________
13
The broadcast sequence writes data to the control regis-
ters of all the devices on the bus at the same time. Write
data with the LSB first. The following is the command
sequence and timing diagram (Figure 9) for the broad-
cast transaction. No address sequence is required. Use
the broadcast command when there is only one device
on the bus.
Executing a software reset serves the same function as
a power-on reset and is achieved by transmitting all
data bits (eight or more) for the MAX7428, sixteen or
more ones for the MAX7430, or 24 or more ones for the
MAX7432A to that device register.
Composite Video Filtering
The MAX7428 is ideally suited for filtering composite
video signals. Program the SYNCIO as an output when
processing composite video signals. In the rare occa-
sion that an external sync pulse is needed to process
the composite video, program the SYNCIO as an input.
Broadcast Command Sequence:
T000
Data
≥ 8-bits (MAX7428)
Data
≥ 16-bits (MAX7430)
Data
≥ 24-bits (MAX7432A)
T111
Read Command Sequence:
T101
Prompts
≥ 8 (MAX7428)
Prompts
≥ 16 (MAX7430)
Prompts
≥ 24 (MAX7432A)
T111
ADDRESS: 0001
tWAIT
tINTWAIT
tINT
tT
t1
tT
t1
t0
LSB
MSB
Figure 5. Initialization Timing Diagram
ADDRESS: 0001
tWAIT
tT
t1
t0
t1
t0
LSB
MSB
Figure 6. Address Timing Diagram
DATA: 1***000
tWAIT
tT
t1
t0
t1
tT
t1
t0
LSB
MSB
Figure 7. Write Timing Diagram
Software Reset Command Sequence:
T000
8 or more 1s (MAX7428)
16 or more 1s (MAX7430)
24 or more 1s (MAX7432A)
T111
OR
T010
Address = 4-bits
T111
T001
8 or more 1s (MAX7428)
16 or more 1s (MAX7430)
24 or more 1s (MAX7432A)
T111
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