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参数资料
| 型号： | MAX748AEWE+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 10/12页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK 3.3V 0.5A 16SOIC |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 1,000 |
| 类型： | 降压（降压） |
| 输出类型： | 固定 |
| 输出数： | 1 |
| 输出电压： | 3.3V |
| 输入电压： | 3.3 V ~ 16 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 180kHz |
| 电流 - 输出： | 500mA |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.295"，7.50mm 宽） |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 16-SOIC W |
3.3V, Step-Down,
Current-Mode PWM DC-DC Converters
INPUT
MAX748A 3.3V TO 16.0V
MAX763A 3.3V TO 11.0V
1
SHDN
VIN
8
V+
LX
7
C2
1.0 μ F
C3*
150 μ F
(16V)
INPUT
MAX748A 3.3V TO 16.0V
MAX763A 3.3V TO 11.0V
1
SHDN
VIN
8
V+
LX
7
C2
1.0 μ F
C3*
68 μ F
(16V)
C1
0.047 μ F
3
SS
MAX748A
MAX763A
GND REF
6 2
5
OUT
4
CC
C6
1000pF
D1
1N5817
C5
330pF
L1
22 μ H
OUTPUT
3.3V
C4*
220 μ F
(10V)
C1
0.047 μ F
3
SS
MAX748A
MAX763A
GND REF
6 2
5
OUT
4
CC
C6
1000pF
D1
1N5817
C5
330pF
L1
22 μ H
OUTPUT
3.3V
C4*
100 μ F
(6.3V)
*OS-CON Series (very low ESR)
Figure 4. Standard 3.3V Step-Down Application Circuit Using
Through-Hole Components (all temperature ranges)
The capacitor’s ESR should be less than 0.25 ? to keep
the output ripple less than 50mV p-p over the entire cur-
rent range (using a 22μH inductor). Capacitor ESR
usually rises at low temperatures, but OS-CON capaci-
tors provide very low ESR below 0°C. Table 3 lists
capacitor suppliers.
Other Components
The catch diode should be a Schottky or high-speed
silicon rectifier with a peak current rating of at least
1.0A for full-load (500mA) operation. The 1N5817 is a
good choice. The 330pF outer-loop compensation
capacitor provides the widest input voltage range and
best transient characteristics.
Printed Circuit Layouts
A good layout is essential for stable, low-noise opera-
tion. The layouts and component placement diagrams
*Sprague 293D or 595D Series-16V. See Table 3
for alternative suppliers.
Figure 5. Standard 3.3V Step-Down Application Circuit Using
Surface-Mount Components (Commercial and Extended
Industrial Temperature Ranges)
in Figures 6-9 have been tested successfully over a
wide range of operating conditions. The 1μF input
bypass capacitor must be positioned as close to
the V+ and GND pins as possible. Also, place the
output capacitor as close to the OUT and GND pins as
possible. The traces connecting ground to the input
and output filter capacitors and to the catch diode
must be short to reduce inductance. Use an uninter-
rupted ground plane if possible.
Output-Ripple Filtering
A simple lowpass pi-filter (Figure 3) can be added to
the output to reduce output ripple to about 5mV p-p .
The cutoff frequency shown is 21kHz. Since the filter
inductor is in series with the circuit output, minimize the
filter inductor’s resistance so the voltage drop across it
is not excessive.
10
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