参数资料
型号: MAX7504MUA+T
厂商: Maxim Integrated
文件页数: 3/13页
文件大小: 710K
描述: IC TEMP SENSOR DIGIT 8-UMAX
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
功能: 温度监视系统(传感器),监视器
传感器类型: 内部
感应温度: -55°C ~ 125°C
精确度: ±3°C(最小值)
拓扑: ADC(三角积分型),寄存器库
输出类型: I²C?/SMBus?
输出警报:
输出风扇:
电源电压: 3 V ~ 5.5 V
工作温度: -55°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-TSSOP,8-MSOP(0.118",3.00mm 宽)
供应商设备封装: 8-uMAX
包装: 带卷 (TR)
Digital Temperature Sensors and Thermal
Watchdog with Bus Lockup Protection
_______________________________________________________________________________________   3
Note 4:
All parameters are measured at +25癈. Values over the temperature range are guaranteed by design.
Note 5:
There are no industry-wide standards for temperature accuracy specifications. These values allow comparison to ven-
dors who use 3-?limits.
Note 6:
This specification indicates how often temperature data is updated. The devices can be read at any time without regard
to conversion state, while yielding the last conversion result.
Note 7:
For best accuracy, minimize output loading. Higher sink currents can affect sensor accuracy due to internal heating.
Note 8:
OS delay is user programmable up to six over-limit conversions before OS is set to minimize false tripping in noisy
environments.
Note 9:
Default values set at power-up.
Note 10:   All timing specifications are guaranteed by design.
Note 11:   A master device must provide a hold time of at least 300ns for the SDA signal to bridge the undefined region of SCLs
falling edge.
Note 12:   C
B
= total capacitance of one bus line in pF. Tested with C
B
= 400pF.
Note 13:   Input filters on SDA, SCL, and A_ suppress noise spikes less than 50ns.
Note 14:   Holding the SDA line low for a time greater than t
TIMEOUT
causes the devices to reset SDA to the IDLE state of the serial
bus communication (SDA set high).
ELECTRICAL CHARACTERISTICS (continued)
(+V
S
= +3.0V to +5.5V, T
A
= -55癈 to +125癈, unless otherwise noted. Typical values are at +V
S
= +5V, T
A
= +25癈.) (Notes 4, 5)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
I
2
C-COMPATIBLE TIMING (Note 10)
Serial Clock Frequency
f
SCL
Bus timeout inactive
DC
400
kHz
Minimum RESET Pulse Width
1
Bus Free Time Between STOP
and START Conditions
t
BUF
1.3
START Condition Hold Time
t
HD:STA
0.6
STOP Condition Setup Time
t
SU:STO
90% of SCL to 10% of SDA
100
ns
Clock Low Period
t
LOW
1.3
Clock High Period
t
HIGH
0.6
START Condition Setup Time
t
SU:STA
90% of SCL to 90% of SDA
100
ns
Data Setup Time
t
SU:DAT
10% of SDA to 10% of SCL
100
ns
Data Hold Time
t
HD:DAT
10% of SCL to 10% of SDA (Note 11)
0
0.9
Maximum Receive SCL/SDA Rise
Time
t
R
300
ns
Minimum Receive SCL/SDA Rise
Time
t
R
(Note 12)
20 +
0.1 x
C
B
ns
Maximum Receive SCL/SDA Fall
Time
t
F
300
ns
Minimum Receive SCL/SDA Fall
Time
t
F
(Note 12)
20 +
0.1 x
C
B
ns
Transmit SDA Fall Time
t
F
(Note 12)
20 +
0.1 x
C
B
250
ns
Pulse Width of Suppressed Spike
t
SP
(Note 13)
0
50
ns
SDA Time Low for Reset of Serial
Interface
t
TIMEOUT
MAX7500/MAX7501/MAX7502 (Note 14)
150
300
ms
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