参数资料
型号: MAX792MCSE+T
厂商: Maxim Integrated Products
文件页数: 14/16页
文件大小: 0K
描述: IC SUPERVISOR MPU 16-SOIC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 简单复位/加电复位
监视电压数目: 1
输出: 推挽式,推挽式
复位: 高有效/低有效
复位超时: 最小为 140 ms
电压 - 阀值: 4.37V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
供应商设备封装: 16-SOIC
包装: 带卷 (TR)
Microprocessor and Nonvolatile
Memory Supervisory Circuits
+5V
R P *
3
V CC
CE
CE
RAM 1
BUFFER
TO OTHER
14
MAX792
MAX820
CE IN CE OUT
13
CE
CE
RAM 2
V CC
3
V CC
RESET
1
4.7k
RESET
V CC
μ P
SYSTEM RESET
INPUTS
CE
GND
12
CE
RAM 3
MAX792
MAX820
CE
* MAXIMUM R P VALUE DEPENDS ON
THE NUMBER OF RAMS.
MINIMUM R P VALUE IS 1k ?
CE
ACTIVE-HIGH CE
RAM 4
GND
12
GND
LINES FROM LOGIC
Figure 11. Alternate CE Gating
Alternative Chip-Enable Gating
Using memory devices with both CE and CE inputs
allows the MAX792/MAX820 CE propagation delay
to be bypassed. To do this, connect CE IN to ground,
pull up CE OUT to V CC , and connect CE OUT to the CE
input of each memory device (Figure 11). The CE input
of each memory device then connects directly to the
chip-select logic, which does not have to be gated by
the MAX792/MAX820.
Interfacing to μPs with Bidirectional
Reset Inputs
μPs with bidirectional reset pins, such as the Motorola
68HC11 series, can contend with the MAX792/MAX820
RESET output. If, for example, the MAX792/MAX820 RESET
output is asserted high and the μP wants to pull it low,
Figure 12. Interfacing to μPs with Bidirectional RESET Pins
going V CC pulses, starting at 5V and ending below the
reset threshold by the magnitude indicated (reset-
comparator overdrive). The graph shows the maximum
pulse width a negative-going V CC transient may typi-
cally have without causing a reset pulse to be issued.
As the amplitude of the transient increases (i.e., goes
farther below the reset threshold), the maximum allow-
able pulse width decreases. Typically, a V CC transient
that goes 100mV below the reset threshold and lasts for
30μs or less will not cause a reset pulse to be issued.
A 100nF bypass capacitor mounted close to the V CC
pin provides additional transient immunity.
100
indeterminate logic levels may result. To avoid this,
connect a 4.7k ? resistor between the MAX792/MAX820
RESET output and the μP reset I/O, as in Figure 12.
Buffer the MAX792/MAX820 RESET output to other sys-
tem components.
Negative-Going V CC Transients
While issuing resets to the μP during power-up, power-
down, and brownout conditions, these supervisors are
relatively immune to short-duration negative-going V CC
transients (glitches). It is usually undesirable to reset
80
60
40
20
0
V CC = 5V
T A = +25°C
the μP when V CC experiences only small glitches.
10
100
1000
10,000
Figure 13 shows maximum transient duration vs. reset-
comparator overdrive, for which reset pulses are not
generated. The graph was produced using negative-
RESET COMPARATOR OVERDRIVE, (V TH - V CC ) (mV)
Figure 13. Maximum Transient Duration Without Causing a
Reset Pulse vs. Reset-Comparator Overdrive
14
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