参数资料
型号: MAX795RESA+T
厂商: Maxim Integrated Products
文件页数: 14/20页
文件大小: 0K
描述: IC SUPERVISOR MPU 8-SOIC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 备用电池电路
监视电压数目: 1
输出: 开路漏极或开路集电极
复位: 低有效
复位超时: 最小为 140 ms
电压 - 阀值: 2.625V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 带卷 (TR)
3.0V/3.3V Adjustable Microprocessor
Supervisory Circuits
3.0V OR 3.3V
V IN
3.0V OR 3.3V
R1
V CC
R1
V CC
PFI
MAX793
MAX794
PFO
PFI
MAX793
MAX794
PFO
V CC
PFO
R2
V IN
GND
V CC
PFO
R2
GND
MR
V L
V TRIP
0V
V IN
V TRIP
V H
V IN
( R1 + R2 ) –
( R1 + R2 ) –
V L = R2 (V PFT )
(
)
V TRIP = V PFT
(
V H = (V PFT + V PFH )
V TRIP = R2 (V PFT + V PFH )
1 1 V CC
1 1
R1
V CC
R1
WHERE V PFT = 1.237V
V PFH = 10mV
NOTE: V TRIP, V L ARE NEGATIVE
R1 + R2
R2
R1 + R2
R2
)
(a)
(b)
Figure 12. Using the Power-Fail Comparator to Monitor an Additional Power Supply: (a) V IN Is Negative, (b) V IN Is Positive
The power-fail comparator turns off and PFO goes low
when V CC falls below V SW on power-down. During the
first half of the reset timeout period (t RP ), PFO is forced
high, irrespective of V PFI . At the beginning of the sec-
ond half of t RP , the power-fail comparator is enabled
and PFO follows PFI. If the comparator is unused, con-
nect PFI to V CC and leave PFO unconnected. PFO can
be connected to MR so that a low voltage on PFI gener-
ates a reset (Figure 12b). In this configuration, when
the monitored voltage causes PFI to fall below V PFT ,
PFO pulls MR low, causing a reset to be asserted.
Reset remains asserted as long as PFO holds MR low,
and for 200ms after PFO pulls MR high when the moni-
tored supply is above the programmed threshold.
Backup-Battery Switchover
In the event of a brownout or power failure, it may be
necessary to preserve the contents of RAM. With a
backup battery installed at BATT, the devices automati-
cally switch RAM to backup power when V CC falls. In
order to allow the backup battery (e.g., a 3.6V lithium
cell) to have a higher voltage than V CC , this family of μP
supervisors (designed for 3.3V and 3V systems) does
not always connect BATT to OUT when V BATT is
greater than V CC . BATT connects to OUT (through a
140 ? switch) either when V CC falls below V SW and
V BATT is greater than V CC , or when V CC falls below
1.75V (typ) regardless of the BATT voltage.
Switchover at V SW ensures that battery-backup mode is
entered before V OUT gets too close to the 2.0V mini-
mum required to reliably retain data in most CMOS
RAM, (switchover at higher V CC voltages would
decrease backup-battery life). When V CC recovers,
switchover is deferred either until V CC crosses V BATT if
V BATT is below V RST , or when V CC rises above the
reset threshold (V RST ) if V BATT is above V RST . This
power-up switchover technique prevents V CC from
charging the backup battery through OUT when using
an external transistor driven by BATT ON. OUT con-
nects to V CC through a 4 ? (max) PMOS power switch
when V CC crosses the reset threshold (Figure 13).
BATT ON (MAX793/MAX794)
BATT ON is high when OUT is connected to BATT.
Although BATT ON can be used as a logic output to
indicate the battery switchover status, it is most often
used as a gate or base drive for an external pass tran-
sistor for high-current applications (see Driving an
External Switch with BATT ON in the Applications
Information section). When V CC exceeds V RST on
power-up, BATT ON sinks 3.2mA at 0.4V. In battery-
backup mode, this terminal sources 100μA from BATT.
14
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