参数资料
型号: MAX797HESE+T
厂商: Maxim Integrated Products
文件页数: 5/8页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 16-SOIC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
PWM 型: 混合物
输出数: 1
频率 - 最大: 330kHz
占空比: 96%
电源电压: 4.5 V ~ 40 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
High-Voltage, Step-Down Controller with
Synchronous Rectifier for CPU Power
______________________________________________________________Pin Description
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
NAME
SS
SKIP
REF
GND
SYNC
SHDN
FB
CSH
CSL
V+
VL
PGND
DL
BST
LX
DH
FUNCTION
Soft-Start Timing Capacitor Connection. Ramp time to full current limit is approximately 1ms/nF.
Disables pulse-skipping mode when high. Connect SKIP to GND for normal use. Do not leave unconnected.
With SKIP grounded, the device automatically changes from pulse-skipping operation to full PWM operation
when the load current exceeds approximately 30% of maximum.
Reference Voltage Output. Bypass REF to GND with 0.33μF minimum.
Low-noise Analog Ground and Feedback Reference Point
Oscillator Synchronization and Frequency Select. Tie SYNC to GND or VL for 150kHz operation; tie to REF for
300kHz operation. A high-to-low transition begins a new cycle. Drive SYNC with 0V to 5V logic levels (see
Electrical Characteristics for V IH and V IL specifications). SYNC capture range is guaranteed to be 190kHz to
340kHz.
Shutdown Control Input, Active Low. Logic threshold is set at approximately 1V (V TH of an internal N-channel
MOSFET). Tie SHDN to V+ for automatic start-up.
Feedback Input. Regulates at FB = REF (approximately 2.505V) in adjustable mode. FB is a Dual Mode TM
input that also selects the fixed-output voltage settings as follows:
? Connect to GND for 3.3V operation.
? Connect to VL for 5V operation.
? Connect to a resistor divider for adjustable mode. FB can be driven with 5V Rail-to-Rail? logic to change
the output voltage under system control.
Current-Sense Input, High Side. Current-limit level is 100mV referred to CSL.
Current-Sense Input, Low Side. CSL also serves as the feedback input in fixed-output modes.
Battery Voltage Input (4.5V to 30V). Bypass V+ to PGND close to the IC with a 0.1μF capacitor. Connects to a
linear regulator that powers VL.
5V Internal Linear-Regulator Output. VL is also the supply-voltage rail for the chip. It is switched to the output
voltage via CSL (V CSL > 4.5V) for automatic bootstrapping. Bypass to GND with 4.7μF. VL can supply up to
5mA for external loads.
Power Ground
Low-Side Gate-Drive Output. DL normally drives the synchronous-rectifier MOSFET. Swings 0V to VL.
Boost Capacitor Connection for High-Side Gate Drive (0.1μF)
Switching Node (inductor) Connection. LX can swing 2V below ground without hazard.
High-Side Gate-Drive Output. DH normally drives the main buck switch. It is a floating driver output that
swings from LX to BST, riding on the LX switching-node voltage.
Dual Mode is a trademark of Maxim Integrated Products.
Rail-to-Rail is a registered trademark of Nippon Motorola Ltd.
_______________________________________________________________________________________
5
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