参数资料
型号: MAX814TESA+T
厂商: Maxim Integrated Products
文件页数: 13/16页
文件大小: 0K
描述: IC SUPERVISOR MPU LP 8SOIC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 简单复位/加电复位
监视电压数目: 1
输出: 推挽式,推挽式
复位: 高有效/低有效
复位超时: 最小为 140 ms
电压 - 阀值: 3.03V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 带卷 (TR)
±1% Accuracy, Low-Power, +3V and +5V
μP Supervisory Circuits
+12V
+5V
MAX814
340k ?
1%
V CC
RESET
TO μ P
MAX815
MAX816
RESET
R1
100k ?
1%
PFI
MAX814K/L/N MR
MAX815K/L/N
PFO
GND
PARAMETER
MIN
TYP
MAX
UNIT
+12V Reset
Threshold at +25 ° C
10.57 11.00 11.45
V
Figure 10. RESET Valid to Ground Circuit
Monitoring Voltages Other than V CC
Monitor voltages other than the V CC by connecting a
voltage divider to PFI and adjusting the ratio appropri-
ately. If required, add hysteresis by connecting a resis-
tor (with a value approximately 10-times the sum of the
two resistors in the potential divider network) between
PFI and PFO. A capacitor between PFI and GND will
reduce the power-fail circuit’s sensitivity to high-fre-
quency noise on the line being monitored. RESET can
be asserted on other voltages in addition to the +5V
V CC line. Connect PFO to MR to initiate a reset when
PFI drops below 2.50V (K, L, N suffix) or 1.70V (T suffix
or MAX816). Figure 11 shows the MAX814K/L/N/
MAX815K/L/N configured to assert RESET when the
+5V supply falls below the reset threshold, or when the
+12V supply falls below approximately 11V.
Monitoring a Negative Voltage
The power-fail comparator can also monitor a negative
supply rail (Figure 12). When the negative rail is good
(a negative voltage of large magnitude), PFO is low.
When the negative rail is degraded (a negative voltage
of lesser magnitude), PFO is high. By adding the resis-
tors and transistor as shown, a high PFO triggers reset.
As long as PFO remains high, the MAX814/MAX815/
MAX816 will keep reset asserted (RESET = low, RESET
= high). Note that this circuit’s accuracy depends on the
PFI threshold tolerance, the V CC line, and the resistor.
Figure 11. Monitoring Both +5V and +12V
Watchdog Software Considerations
A way to help the watchdog timer keep closer tabs on
software execution involves setting and resetting the
watchdog input at different points in the program,
rather than pulsing the watchdog input high-low-high or
low-high-low. This technique avoids a stuck loop where
the watchdog timer continues to be reset within the
loop, keeping the watchdog from timing out. Figure 13
shows an example flow diagram where the I/O driving
the watchdog input is set low at the beginning of the
program, set high at the beginning of every subroutine,
then set low at the end of every subroutine. If the pro-
gram should hang in any subroutine, the I/O is continu-
ally set high and the watchdog timer is allowed to time
out, causing a reset to be issued.
______________________________________________________________________________________
13
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