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| 型号： | MAX825ZEXK+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 8/10页 |
| 文件大小： | 0K |
| 描述： | IC SUPERVISOR MPU SC70-5 |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 简单复位/加电复位 |
| 监视电压数目： | 1 |
| 输出： | 推挽式，图腾柱 |
| 复位： | 高有效/低有效 |
| 复位超时： | 最小为 140 ms |
| 电压 - 阀值： | 2.32V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 6-TSSOP（5 引线），SC-88A，SOT-353 |
| 供应商设备封装： | SC-70-5 |
| 包装： | 带卷 (TR) |
5-Pin Microprocessor Supervisory Circuits With
Watchdog Timer and Manual Reset
Interfacing to μPs with
Bidirectional Reset Pins
The RESET output maximum pullup current is 800μA for
L/M versions (400μA for T/S/R/Z/Y versions). This allows
μPs with bidirectional resets, such as the 68HC11, to
force RESET low when the MAX823/MAX824/MAX825
are pulling RESET high (Figure 4).
Negative-Going V CC Transients
These supervisors are relatively immune to short-
duration, negative-going V CC transients (glitches), which
usually do not require the entire system to shut down.
Resets are issued to the μP during power-up, power-
down, and brownout conditions.
The Typical Operating Characteristics show a graph of
the MAX823_’s Maximum V CC Transient Duration vs.
Reset Threshold Overdrive, for which reset pulses are
not generated. The graph was produced using nega-
tive-going V CC pulses, starting at 5V and ending below
the reset threshold by the magnitude indicated (reset
threshold overdrive). The graph shows the maximum
pulse width that a negative-going V CC transient can
typically have without triggering a reset pulse. As the
amplitude of the transient increases (i.e., goes farther
below the reset threshold), the maximum allowable
An optional 0.1μF bypass capacitor mounted close to
V CC provides additional transient immunity.
Watchdog Software Considerations
(MAX823/MAX824)
One way to help the watchdog timer monitor software
execution more closely is to set and reset the watchdog
input at different points in the program, rather than
pulsing the watchdog input high-low-high or low-high-
low. This technique avoids a stuck loop, in which the
watchdog timer would continue to be reset inside the
loop, keeping the watchdog from timing out.
Figure 5 shows an example of a flow diagram where the
I/O driving the watchdog input is set high at the begin-
ning of the program, set low at the beginning of every
subroutine or loop, then set high again when the pro-
gram returns to the beginning. If the program should
hang in any subroutine, the problem would quickly be
corrected, since the I/O is continually set low and the
watchdog timer is allowed to time out, causing a reset
or interrupt to be issued. As described in the Watchdog
Input Current section, this scheme results in higher time
average WDI input current than does leaving WDI low
for the majority of the timeout period and periodically
pulsing it low-high-low.
pulse width decreases.
V CC
START
V CC
MAX823
V CC
SET WDI
HIGH
MAX824
MAX825
RESET
GENERATOR
I SOURCE MAX = 800 μ A L, M
400 μ A T, S, R, Z, Y
V CC
RESET
μ P
PROGRAM
CODE
SUBROUTINE OR
PROGRAM LOOP
SET WDI LOW
GND
GND
RETURN
Figure 4. Interfacing to μPs with Bidirectional Resets
Figure 5. Watchdog Flow Diagram
8
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