参数资料
型号: MAX846AEEE+
厂商: Maxim Integrated Products
文件页数: 7/12页
文件大小: 0K
描述: IC SYS BAT CHRG 16-QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 100
功能: 充电管理
电池化学: 多化学
电源电压: 3.7 V ~ 20 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
供应商设备封装: 16-QSOP
包装: 管件
产品目录页面: 1409 (CN2011-ZH PDF)
Cost-Saving Multichemistry
Battery-Charger System
Voltage/Current Regulator
The voltage/current regulator consists of a precision
attenuator, voltage loop, current-sense amplifier, and
current loop. The attenuator can be pin programmed to
set the regulation voltage for one or two Li-Ion cells
(4.2V and 8.4V, respectively). The current-sense ampli-
fier is configured to sense the battery current on the
high side. It is, in essence, a transconductance amplifi-
er converting the voltage across an external sense
resistor (R CS ) to a current, and applying this current to
an external load resistor (R ISET ). Set the charge current
by selecting R CS and R ISET . The charge current can
also be adjusted by varying the voltage at the low side
of R ISET or by summing/subtracting current from the
ISET node (Figure 5). The voltage and current loops are
individually compensated using external capacitors at
CCV and CCI, respectively. The outputs of these two
loops are OR ’ed together and drive an open-drain,
internal N-channel MOSFET transistor sinking current to
ground. An external P-channel MOSFET or PNP transis-
tor pass element completes the loop.
Stability
The Typical Operating Characteristics show the loop
gains for the current loop and voltage loop. The domi-
nant pole for each loop is set by the compensation
capacitor connected to each capacitive compensation
pin (CCI, CCV). The DC loop gains are about 50dB for
the current loop and about 33dB for the voltage loop,
for a battery impedance of 250m ? .
The CCI output impedance (50k ? ) and the CCI capaci-
tor determine the current-loop dominant pole. In Figure
2, the recommended C CCV is 10nF, which places a
dominant pole at 300Hz. There is a high-frequency
pole, due to the external PNP, at approximately f T /?.
This pole frequency (on the order of a few hundred kilo-
hertz) will vary with the type of PNP used. Connect a
10nF capacitor between the base and emitter of the
Table 1. Float-Voltage Accuracy
ERROR SOURCE
Internal-reference accuracy
PNP to prevent self-oscillation (due to the high-imped-
ance base drive).
Similarly, the CCV output impedance (150k ? ) and the
CCV capacitor set the voltage-loop dominant pole. In
Figure 2, the compensation capacitance is 10nF, which
places a dominant pole at 200Hz.
The battery impedance directly affects the voltage-loop
DC and high-frequency gain. At DC, the loop gain is
proportional to the battery resistance. At higher fre-
quencies, the AC impedance of the battery and its con-
nections introduces an additional high-frequency zero.
A 4.7μF output capacitor in parallel with the battery,
mounted close to BATT, minimizes the impact of this
impedance. The effect of the battery impedance on DC
gain is noticeable in the Voltage-Loop-Gain graph (see
Typical Operating Characteristics). The solid line repre-
sents voltage-loop gain versus frequency for a fully
charged battery, when the battery energy level is high
and the ESR is low. The charging current is 100mA. The
dashed line shows the loop gain with a 200mA charg-
ing current, a lower amount of stored energy in the bat-
tery, and a higher battery ESR.
__________Applications Information
Stand-Alone Li-Ion Charger
Figure 2 shows the stand-alone configuration of the
MAX846A. Select the external components and pin
configurations as follows:
? Program the number of cells: Connect CELL2 to GND
for one-cell operation, or to VL for two-cell operation.
? Program the float voltage: Connect a 1% resistor from
VSET to GND to adjust the float voltage down, or to
VL to adjust it up. If VSET is unconnected, the float
voltage will be 4.2V per cell. Let the desired float volt-
age per cell be V F , and calculate the resistor value
as follows:
ERROR
±0.5%
VSET error due to external divider. Calculated from a 2% internal 20k ? resistor tolerance and
a 1% external R VSET resistor tolerance. The total error is 3% x (adjustment). Assume max
adjustment range of 5%.
VSET amplifier and divider accuracy
TOTAL
±0.15%
±0.25%
±0.9%
_______________________________________________________________________________________
7
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