参数资料
型号: MAX8537EEI+
厂商: Maxim Integrated Products
文件页数: 18/23页
文件大小: 0K
描述: IC CNTRLR BUCK DUAL 28-QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
应用: 控制器,DDR
输入电压: 4.5 V ~ 23 V
输出数: 2
输出电压: 0.8 V ~ 3.6 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-QSOP
供应商设备封装: 28-QSOP
包装: 管件
Dual-Synchronous Buck Controllers for Point-of-
Load, Tracking, and DDR Memory Power Supplies
G MOD ( DC ) =
V IN
V RAMP
, where V RAMP = 1 V ( typ )
The error amplifier has a dominant pole at a very low
frequency (~0Hz), and two additional zeros and two
additional poles as indicated by the equations below
f P _ LC =
1
2 π L C O
and illustrated in Figure 6:
f Z1_EA = 1 / (2 π x R4 x C2)
f Z _ ESR =
1
2 π × R ESR × C O
f Z2_EA = 1 / (2 π x (R1 + R3) x C1)
f P2_EA = 1 / (2 π x R3 x C1)
R ESR =
When the output capacitor is composed of paralleling n
number of the same capacitors, then:
C O = n × C EACH
and
R ESR _ EACH
n
Thus, the resulting f Z_ESR is the same as that of a sin-
gle capacitor.
The total closed-loop gain must be equal to unity at the
crossover frequency, where the crossover frequency is
less than or equal to 1/5th the switching frequency (f S ):
f C ≤ f S / 5
So the loop-gain equation at the crossover frequency is:
G EA(FC) x G MOD(FC) = 1
where G EA(FC) is the error-amplifier gain at f C , and
G MOD(FC) is the power-modulator gain at f C .
The loop compensation is affected by the choice of out-
put filter capacitor due to the position of its ESR-zero fre-
quency with respect to the desired closed-loop crossover
frequency. Ceramic capacitors are used for higher
switching frequencies (above 750kHz) and have low
capacitance and low ESR; therefore, the ESR-zero fre-
quency is higher than the closed-loop crossover frequen-
cy. Electrolytic capacitors (e.g., tantalum, solid polymer,
and OS-CON) are needed for lower switching frequen-
cies and have high capacitance and higher ESR; there-
fore, the ESR-zero frequency is lower than the
closed-loop crossover frequency. Thus, the compensa-
tion design procedures are separated into two cases:
Case 1: Crossover frequency is less than the output-
capacitor ESR-zero (f C < f Z_ESR ).
The modulator gain at f C is:
G MOD(FC) = G MOD(DC) x (f P_LC / f C ) 2
Since the crossover frequency is lower than the output
capacitor ESR-zero frequency and higher than the LC
double-pole frequency, the error-amplifier gain must
have a +1 slope at f C so that, together with the -2 slope
of the LC double pole, the loop crosses over at the
desired -1 slope.
f P3_EA = 1 / (2 π x R4 x (C2 x C3 / (C2 + C3)))
Note that f Z2_EA and f P2_EA are chosen to have the
converter closed-loop crossover frequency, f C , occur
when the error-amplifier gain has +1 slope, between
f Z2_EA and f P2_EA . The error-amplifier gain at f C must
meet the requirement below:
G EA(FC) = 1 / G MOD(FC)
The gain of the error amplifier between f Z1_EA and
f Z2_EA is:
G EA (f Z1_EA - f Z2_EA ) = G EA(FC) x f Z2_EA / f C =
f Z2_EA / (f C x G MOD(FC) )
This gain is set by the ratio of R4/R1, where R1 is calcu-
lated in the Output Voltage Setting section. Thus:
R4 = R1 x f Z2_EA / (f C x G MOD(FC) )
where f Z2_EA = f P_LC .
Due to the underdamped (Q > 1) nature of the output
LC double pole, the first error-amplifier zero frequency
must be set less than the LC double-pole frequency in
order to provide adequate phase boost. Set the error-
amplifier first zero, f Z1_EA , at 1/4th the LC double-pole
frequency. Hence:
C2 = 2 / ( π x R4 x f P_LC )
Set the error amplifier f P2_EA at f Z_ESR and f P3_EA equal
to half the switching frequency. The error-amplifier gain
between f P2_EA and f P3_EA is set by the ratio of R4/R I
and is equal to:
G EA (f Z1_EA - f Z2_EA ) x (f Z_ESR / f P_LC )
where R I = R1 x R3 / (R1 + R3). Then:
R I = R4 x f P_LC / (G EA (f Z1_EA - f Z2_EA ) x f Z_ESR ) =
R4 x f C x G MOD(FC) / f Z_ESR
The value of R3 can then be calculated as:
R3 = R1 x R I / (R1 – R I )
Now we can calculate the value of C1 as:
C1 = 1 / (2 π x R3 x f Z_ESR )
and C3 as:
C3 = C2 / ((2 π x C2 x R4 x f P3_EA ) - 1)
18
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