参数资料
型号: MAX8537EEI+T
厂商: Maxim Integrated Products
文件页数: 21/23页
文件大小: 0K
描述: IC CNTRLR BUCK DUAL 28-QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: 控制器,DDR
输入电压: 4.5 V ~ 23 V
输出数: 2
输出电压: 0.8 V ~ 3.6 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-QSOP
供应商设备封装: 28-QSOP
包装: 带卷 (TR)
Dual-Synchronous Buck Controllers for Point-of-
Load, Tracking, and DDR Memory Power Supplies
Pin Configurations
TOP VIEW
BST2 1
DH2 2
LX2 3
ILIM2 4
POK1 5
28 BST1
27 DH1
26 LX1
25 ILIM1
24 PGND
BST2 1
DH2 2
LX2 3
ILIM2 4
POK1 5
28 BST1
27 DH1
26 LX1
25 ILIM1
24 PGND
DL2 6
POK2 7
EN2 8
EN1 9
FREQ 10
COMP2 11
FB2 12
SS2 13
REFIN 14
MAX8537
MAX8539
23 DL1
22 VL
21 V+
20 AVL
19 VTTR
18 COMP1
17 FB1
16 SS1
15 GND
DL2 6
POK2 7
EN2 8
EN1 9
FREQ 10
COMP2 11
FB2 12
SS2 13
N.C. 14
MAX8538
23 DL1
22 VL
21 V+
20 AVL
19 GND
18 COMP1
17 FB1
16 SS1
15 GND
QSOP
Case 2: Crossover frequency is greater than the
output-capacitor ESR zero (f C > f Z_ESR ) .
The modulator gain at f C is:
G MOD(FC) = G MOD(DC) x (f P_LC ) 2 / (f Z_ESR x f C )
Since the output-capacitor ESR-zero frequency is high-
er than the LC double-pole frequency but lower than
the closed-loop crossover frequency, where the modu-
lator already has -1 slope, the error-amplifier gain must
have zero slope at f C so the loop crosses over at the
desired -1 slope.
The error-amplifier circuit configuration is the same as
case 1 above; however, the closed-loop crossover fre-
quency is now between f P2 and f P3 as illustrated in
Figure 7.
The equations that define the error amplifier’s zeros
(f Z1_EA , f Z2_EA ) and poles (f P2_EA , f P3_EA ) are the same
as case 1; however, f P2_EA is now lower than the
closed-loop crossover frequency. Therefore, the error-
amplifier gain between f Z1_EA and f Z2_EA is now calcu-
lated as:
G EA (f Z1_EA - f Z2_EA ) = G EA(FC) x f Z2_EA / f P2_EA =
f Z2_EA / (f P2_EA x G MOD(FC) )
This gain is set by the ratio of R4/R1, where R1 is calcu-
lated in the Output Voltage Setting section. Thus:
QSOP
R4 = R1 x f Z2_EA / (f P2_EA x G MOD(FC) )
where f Z2_EA = f P_LC and f P2_EA = f Z_ESR .
Similar to case 1, C2 can be calculated as:
C2 = 2 / ( π x R4 x f P_LC )
Set the error-amplifier third pole, f P3_EA , at half the
switching frequency, and let R I = (R1 x R3) / (R1 + R3).
The gain of the error amplifier between f P2_EA and
f P3_EA is set by the ratio of R4/R I and is equal to
G EA(FC) = 1 / G MOD(FC) . Then:
R I = R4 x G MOD(FC)
Similar to case 1, R3, C1, and C3 can be calculated as:
R3 = R1 x Ri / (R1 - R I )
C1 = 1 / (2 π x R3 x f Z_ESR )
C3 = C2 / ((2 π x C2 x R4 x f P3_EA ) - 1)
Applications Information
PC Board Layout Guidelines
Careful PC board layout is critical to achieve low
switching losses and clean, stable operation. The
switching-power stage requires particular attention.
Follow these guidelines for good PC board layout:
1) Place the decoupling capacitors as close to the IC
pins as possible.
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MAX8538EEI-T 功能描述:DC/DC 开关控制器 RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK