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| 型号： | MAX8550ETI+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 17/29页 |
| 文件大小： | 0K |
| 描述： | IC PWR SUP DDR INTEG 28TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 60 |
| 应用： | 控制器，DDR |
| 输入电压： | 2 V ~ 28 V |
| 输出数： | 2 |
| 输出电压： | 1.8V，2.5V，0.7 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-WFQFN 裸露焊盘 |
| 供应商设备封装： | 28-TQFN-EP（5x5） |
| 包装： | 管件 |
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MAX8550/MAX8551
Integrated DDR Power-Supply Solutions for
Desktops, Notebooks, and Graphic Cards
Current Limit (LDO for VTT
and VTTR Buffer)
The VTT output is a linear regulator that regulates the
input (VTTI) to half the V REFIN voltage. The feedback
point for VTT is at the VTTS input (Figure 1). VTT is
capable of sinking and sourcing at least 1.5A of continu-
ous current and 3A peak current. The current limit for
VTT and VTTR is typically ±5A and ±40mA, respective-
ly. When the current limit for either output is reached,
the outputs regulate the current, not the voltage.
Fault Protection
The MAX8550/MAX8551 provide overvoltage/undervolt-
age fault protection in the buck controller. Select
OVP/UVP to enable and disable fault protection as
shown in Table 3. Once activated, the controller contin-
uously monitors the output for undervoltage and over-
voltage fault conditions.
Overvoltage Protection (OVP)
When the output voltage rises above 116% of the nomi-
nal regulation voltage (MAX8550 only) and OVP is
enabled (OVP/UVP = AV DD or open), the OVP circuit
sets the fault latch, shuts down the PWM controller, and
immediately pulls DH low and forces DL high. This
turns on the synchronous-rectifier MOSFET (Q2 in the
Typical Applications Circuit of Figure 8) with a 100%
duty cycle, rapidly discharging the output capacitor
and clamping the output to ground. Note that immedi-
ately latching DL high can cause the output voltage to
go slightly negative due to energy stored in the output
LC circuit at the instant the OVP occurs. If the load can-
not tolerate a negative voltage, place a power Schottky
diode across the output to act as a reverse-polarity
clamp. Toggle SHDNA or cycle AV DD below 1V to clear
Table 3. OVP/UVP Fault Protection
the fault latch and restart the controller. OVP is dis-
abled when OVP/UVP is connected to REF or GND (see
Table 3). OVP only applies to the buck output. The VTT
and VTTR outputs do not have overvoltage protection.
Undervoltage Protection (UVP)
When the output voltage drops below 70% of its regula-
tion voltage while UVP is enabled, the controller sets
the fault latch and begins the discharge mode (see the
Shutdown and Output Discharge section). When the
output voltage drops to 0.3V, the synchronous rectifier
(Q2 in the Typical Applications Circuit) turns on and
clamps the buck output to GND. UVP is ignored for at
least 10ms (min) after startup or after a rising edge on
SHDNA . Toggle SHDNA or cycle AV DD power below 1V
to clear the fault latch and restart the controller. UVP is
disabled when OVP/UVP is left open or connected to
GND (see Table 3). UVP only applies to the buck out-
put. The VTT and VTTR outputs do not have undervolt-
age protection.
Thermal Fault Protection
The MAX8550/MAX8551 feature two thermal-fault-pro-
tection circuits. One monitors the buck-regulator por-
tion of the IC and the other monitors the linear regulator
(VTT) and the reference buffer output (VTTR). When the
junction temperature of the buck-regulator portion of
the MAX8550/MAX8551 rises above +160°C, a thermal
sensor activates the fault latch, pulls POK1 low, and
shuts down the buck-controller output using discharge
mode regardless of the OVP/UVP setting. Toggle
SHDNA or cycle AV DD below 1V to reactivate the con-
troller after the junction temperature cools by 15°C. If
the VTT and VTTR regulator portion of the IC has its die
temperature rise above +160 ° C, then VTT and VTTR
OVP/UVP
AV DD
OPEN
REF
GND
Maxim Integrated
DISCHARGE
Yes.
DL forced high when SHDNA and
SHDNB are low.
Yes.
DL forced high when SHDNA and
SHDNB are low.
No.
DL forced low when SHDNA is low.
No.
DL forced low when SHDNA is low.
UVP PROTECTION
Enabled.
Discharge sequence activated. DL
forced high when shut down.
Disabled.
Enabled.
Discharge sequence activated. DL
forced high when shut down.
Disabled.
OVP PROTECTION
Enabled.
DH pulled low and DL forced high.
Enabled.
DH pulled low and DL forced high.
Disabled.
Disabled.
17
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX8550ETI+ | 功能描述:电压模式 PWM 控制器 Integrated DDR Power Supply Solution RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel |
| MAX8550ETI+T | 功能描述:电压模式 PWM 控制器 Integrated DDR Power Supply Solution RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel |
| MAX8550ETI-T | 功能描述:PMIC 解决方案 RoHS:否 制造商:Texas Instruments 安装风格:SMD/SMT 封装 / 箱体:QFN-24 封装:Reel |
| MAX8550EVKIT | 功能描述:电源管理IC开发工具 RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
| MAX8551ETI | 功能描述:DC/DC 开关控制器 RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
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