参数资料
型号: MAX8588ETM+
厂商: Maxim Integrated Products
文件页数: 24/31页
文件大小: 0K
描述: IC PMIC HI EFF LOW IQ 48-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
应用: 处理器
电源电压: 2.6 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-WFQFN 裸露焊盘
供应商设备封装: 48-TQFN-EP(6x6)
包装: 管件
High-Efficiency, Low-I Q PMIC with
Dynamic Core for PDAs and Smartphones
A useful approximation is that it takes approximately 2.2
RC time constants for V3 to move from 10% to 90% of
the voltage difference. For C RAMP = 1500pF, this time
is 330μs. For a 1V to 1.3V change, this equates to
1mV/μs. See the Typical Operating Characteristics for
examples of different ramp-rate settings.
The maximum capacitor value that can be used at
RAMP is 2200pF. If larger values are used, the V3 ramp
rate is still controlled according to the above equation,
but when V3 is first activated, POK indicates an “in reg-
ulation” condition before V3 reaches its final voltage.
The RAMP pin is effectively the reference for REG3.
FB3 regulates to 1.28 times the voltage on RAMP.
Design Procedure
Setting the Output Voltages
The outputs V1 and V2 have preset output voltages, but
can also be adjusted using a resistor voltage-divider. To
set V1 to 3.3V, connect FB1 to GND. V2 can be preset to
3.3V or 2.5V. To set V2 to 3.3V, connect FB2 to IN. To set
to 2.5V, connect FB2 to GND.
To set V1 or V2 to other than the preset output voltages,
connect a resistor voltage-divider from the output volt-
age to the corresponding FB input. The FB_ input bias
current is less than 100nA, so choose the low-side (FB_-
to-GND) resistor (R L ) to be 100k ? or less. Then calcu-
late the high-side (output-to-FB_) resistor (R H ) using:
R H = R L [(V OUT / 1.25) – 1]
The V3 (VCC_CORE) output voltage is set from 0.7V to
1.475V in 25mV steps by the I 2 C serial interface. See
the Serial Interface section for details.
Linear regulator V4 provides a fixed 1.3V output volt-
age. Linear regulator V5 provides a fixed 1.1V output
voltage. V4 and V5 voltages are not adjustable.
The output voltage of linear regulator V6 (VCC_USIM) is
set to 0V, 1.8V, 2.5V, or 3.0V by the I 2 C serial interface.
See the Serial Interface section for details.
Linear regulator V7 (VCC_BATT) tracks the voltage at
V1 as long as ON1 is high and V1 is in regulation. When
ON1 is low or V1 is not in regulation, V7 switches to the
backup battery (V BKBT ).
Inductor Selection
The external components required for the step-down
are an inductor, input-and-output filter capacitors, and
a compensation RC network.
The MAX8588 step-down converter provides its best
efficiency with continuous inductor current. A reason-
able inductor value (L IDEAL ) is derived from:
L IDEAL = [2(V IN ) x D(1 - D)] / (I OUT(MAX) x f OSC )
This sets the peak-to-peak inductor current at 1/2 the
DC inductor current. D is the duty cycle:
D = V OUT / V IN
Given L IDEAL , the peak-to-peak inductor ripple current
is 0.5 x I OUT . The peak inductor current is 1.25 x
I OUT(MAX) . Make sure the saturation current of the
inductor exceeds the peak inductor current and the
rated maximum DC inductor current exceeds the maxi-
mum output current (I OUT(MAX) ). Inductance values
larger than L IDEAL can be used to optimize efficiency or
to obtain the maximum possible output current. Larger
inductance values accomplish this by supplying a
given load current with a lower inductor peak current.
Typically, output current and efficiency are improved
for inductor values up to about two times L IDEAL . If the
inductance is raised too much, however, the inductor
size may become too large, or the increased inductor
resistance may reduce efficiency more than the gain
derived from lower peak current.
Smaller inductance values allow smaller inductor sizes,
but also result in larger peak inductor current for a
given load. Larger output capacitance may then be
needed to suppress the increase in output ripple
caused by larger peak current.
Capacitor Selection
The input capacitor in a DC-DC converter reduces cur-
rent peaks drawn from the battery or other input power
source and reduces switching noise in the controller.
The impedance of the input capacitor at the switching
frequency should be less than that of the input source
so high-frequency switching currents do not pass
through the input source.
The output capacitor keeps output ripple small and
ensures control-loop stability. The output capacitor
must also have low impedance at the switching fre-
quency. Ceramic, polymer, and tantalum capacitors are
suitable, with ceramic exhibiting the lowest ESR and
lowest high-frequency impedance.
Output ripple with a ceramic output capacitor is
approximately:
V RIPPLE = I L(PEAK) [1 / (2 π x f OSC x C OUT )]
24
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