参数资料
型号: MAX8645XETI+T
厂商: Maxim Integrated
文件页数: 12/14页
文件大小: 0K
描述: IC LED DRVR WHITE BCKLGT 28-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
恒定电流:
拓扑: 线性(LDO),切换式电容器(充电泵)
输出数: 8
内部驱动器:
类型 - 主要: 背光
类型 - 次要: 白色 LED
频率: 1MHz
电源电压: 2.7 V ~ 5.5 V
输出电压: 5.5V
安装类型: 表面贴装
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-TQFN-EP(4x4)
包装: 带卷 (TR)
工作温度: -40°C ~ 85°C
1x/1.5x/2x White LED Charge Pumps with Two
LDOs in 4mm x 4mm TQFN
1 μ F
1 μ F
INPUT
2.7V TO 5.5V
C1P
PIN
C1N
C2P
C2N
LDO1
10 μ F
IN
GND
LDO2
1 μ F
1 μ F
OUTPUT
10 μ F
ENM2
MAX8645X
MAX8645Y
OUT
UP TO 240mA
MAIN
FLASH
ENM1
ON/OFF AND
VOLTAGE
SELECTION
ENF
ENLDO
P1
P2
M1
M2
M3
M4
M5
M6
F1
F2
SETM
SETF REFBP
PGND
6.81k Ω
4.12k Ω
0.01 μ F
Figure 4. Schematic for When Fewer than 8 LEDs Are Acceptable
Typical operating waveforms shown in the Typical
Operating Characteristics show input ripple current in
1x, 1.5x, and 2x modes.
Table 2. P1 and P2, LDO Output Voltage
Selection
LDO Output Voltage Selection (P1 and P2)
As shown in Table 2, the LDO output voltages, LDO1
and LDO2 are pin programmable by the logic states of
P1
IN
P2
IN
MAX8645X MAX8645Y
LDO1 (V) LDO2 (V) LDO1 (V) LDO2 (V)
3.3 1.8 2.8 2.6
P1 and P2. P1 and P2 are tri-level inputs: IN, open, and
GND. The input voltage, V IN , must be greater than the
selected LDO1 and LDO2 voltages. The logic states of
P1 and P2 can be programmed only during ENLDO
low. Once the LDO_ voltages are programmed, their
values do not change by changing P1 or P2 during
ENLDO high.
Component Selection
Use only ceramic capacitors with an X5R, X7R, or better
IN
IN
OPEN
OPEN
OPEN
GND
GND
GND
OPEN
GND
IN
OPEN
GND
IN
OPEN
GND
3.0
2.8
3.3
2.6
2.6
3.0
2.8
2.5
1.5
1.5
1.5
1.8
1.5
1.8
1.8
1.8
2.8
2.9
2.6
2.6
2.8
2.9
2.9
2.9
2.8
1.5
1.9
2.6
1.9
1.8
1.9
2.9
dielectric. See Table 3 for a list of recommended parts.
Connect a 1μF ceramic capacitor between LDO1 and
GND, and a second 1μF ceramic capacitor between
LDO2 and GND for 200mA applications. The LDO out-
put capacitor ’s (C LDO ) equivalent series resistance
(ESR) affects stability and output noise. Use output
capacitors with an ESR of 0.1 Ω or less to ensure stability
and optimum transient response. Connect C LDO_ as
close as possible to the MAX8645X/MAX8645Y to mini-
mize the impact of PCB trace inductance.
12
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