参数资料
型号: MAX8688BHETG+T
厂商: Maxim Integrated Products
文件页数: 31/38页
文件大小: 0K
描述: IC PWR SUPPLY CTRLR/MONTR 24TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: 电源控制器/监控器
电源电压: 3 V ~ 3.6 V
电流 - 电源: 6.7mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-WFQFN 裸露焊盘
供应商设备封装: 24-TQFN-EP(4x4)
包装: 带卷 (TR)
Digital Power-Supply Controller/Monitor
with PMBus Interface
PMBUS_REVISION (98h)
The PMBUS_REVISION command returns the revision
of the PMBus specification to which the MAX8688 is
compliant.
The command has 1 data byte. Bits [7:5] indicate the
revision of PMBus specification Part I to which the
MAX8688 is compliant. Bits [4:0] indicate the revision of
PMBus specification Part II to which the MAX8688 is
compliant. The permissible values are shown in Table 7.
This command is read only.
The default PMBUS_REVISION value is 00h which indi-
cates that the MAX8688 is compliant with Part I Rev 1.0
and Part II Rev 1.0.
Table 7. PMBus Revision Data Byte
Contents
MFR_MODEL (9Ah)
The MFR_MODEL command returns the MAX8688
model number.
The default MFR_MODEL value is 4101h.
This command is read only.
MFR_REVISION (9Bh)
The MFR_REVISION command reads the ASCII charac-
ters that contain the MAX8688 revision number with a
block read command.
The default MFR_REVISION value is 3201h.
This command is read only.
MFR_SMB_LOOPBACK (D0h)
The MFR_SMB_LOOPBACK command returns the data
word previously received by the MAX8688. The SMBus
master writes a data word to the MAX8688 using this
BITS [7:5]
000
PART I
REVISION
1.0
BITS [4:0]
00000
PART II
REVISION
1.0
command and then retrieves the data word. A valid
communication channel is established if the master
reads back the same word.
Note that if another command is sent in between the write
MFR_SMB_LOOPBACK command and the read
MFR_ID (99h)
The MFR_ID command returns the MAX8688 manufac-
turer’s identification.
The default MFR_ID value is 4D01h.
This command is read only.
MFR_SMB_LOOPBACK command, the MAX8688 returns
whatever last command data word it receives.
MFR_MODE (D1h)
The MFR_MODE command is used to configure the
MAX8688 to support manufacturer specific commands.
The MFR_MODE command is described in Table 8.
The default MFR_MODE value is 00h.
Table 8. MFR_MODE Bit Definition
BIT
15:8
7
6
BIT NAME
Input Clock Time
Factor
Clock Out Enable
A3 Control Enable
DESCRIPTION
This is equivalent to the number of external clock cycles provided to CLKIO in 100μs - 2.
MFR_MODE[15:8] = f EXT_CLK /10kHz - 2 where f EXT_CLK is the frequency of the external clock. For
example, when f EXT_CLK = 1MHz, f EXT_CLK /10kHz = 100, MFR_MODE[15:8] = 100 – 2 = 98. Valid
external input clock range is from 100kHz (MFR_MODE[15:8] = 8) to 2.5MHz (MFR_MODE[15:8] =
248).
These bits are ignored if the internal clock source is selected as the time base (Clock Source
Select bit = 0)
The Clock Out Enable bit allows the output of a 1MHz reference clock to CLKIO for synchronizing
multiple MAX8688s. Setting this bit to 1 enables the 1MHz output on CLKIO. When this bit is cleared
to 0, no reference clock is outputted.
Setting this bit to 1 enables A3/ONOFF to function as a POL ON/OFF input control. Clearing this bit to
0 ignores the A3/ONOFF state and the MAX8688 is controlled by the OPERATION command alone.
See the A3/ONOFF Operation section.
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