参数资料
型号: MAX868EUB+
厂商: Maxim Integrated Products
文件页数: 8/12页
文件大小: 0K
描述: IC REG MULTI CONFIG ADJ 10UMAX
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
类型: 切换式电容器(充电泵),倍增器,反相
输出类型: 可调式
输出数: 1
输出电压: -3.6 V ~ -11 V
输入电压: 1.8 V ~ 5.5 V
频率 - 开关: 270kHz ~ 630kHz
电流 - 输出: 30mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
包装: 管件
供应商设备封装: 10-µMAX
产品目录页面: 1409 (CN2011-ZH PDF)
Regulated, Adjustable -2x
Inverting Charge Pump
__________Applications Information
Low-Output-Voltage Operation
Since the difference between the voltage of the series-
connected flying capacitors and the output voltage
must be dissipated within the device, the MAX868’s
efficiency is very similar to that of a linear regulator.
Estimate efficiency using the following equation:
unconnected. Furthermore, doubling the flying capaci-
tor to provide the same flying capacitance as the stan-
dard configuration (i.e., setting C F = C1 + C2) provides
the same load-current capability as the standard con-
figuration and reduces the MAX868’s open-loop output
resistance by a factor of two, due to the reduction in the
number of switches in the current path.
Layout and Grounding
η =
| V OUT |
k x V IN
Proper layout is important to obtain optimal perfor-
mance. Connect GND to PGND together using the
shortest trace possible, and similarly connect these
pins to the ground plane. Mount all capacitors as close
where k is a constant equal to 2 for the standard con-
figuration of Figure 5 and equal to 1 for the circuit of
Figure 6. This equation’s denominator is the voltage
resulting from the series connection of the flying capac-
itors (-2 x V IN , as shown in Figure 3b), while its numera-
tor is simply the regulated output voltage.
For applications in which the output voltage will not be
more negative than - | V IN | , the efficiency can be doubled
using the circuit of Figure 6, as compared to the circuit
of Figure 5. In Figure 6, a single flying capacitor is con-
nected between C2+ and C1-, with C2- and C1+ left
to the MAX868 as possible, keeping traces short to
minimize parasitics. Keep all connections to the FB pin
as short as possible. Specifically, locate R1 and R2
next to FB (Figures 7 and 8). Should it become neces-
sary in the final layout, leave room to parallel a feed-
forward capacitor across R1.
Chip Information
TRANSISTOR COUNT: 96
SUBSTRATE CONNECTED TO IN
V IN = 5V
V IN = 5V
1 μ F
SHDN
IN
1 μ F
SHDN
IN
R2
R2
500k
MAX868
500k
MAX868
C2+
FB
0.1 μ F
0.1 μ F
C1+
C1-
C2+
C2-
FB
OUT
R1
750k
V OUT = -7.5V
10 μ F
C F = 0.2 μ F
*
*
C2-
C1+
C1-
PGND
OUT
GND
R1
330k
V OUT = -3.3V
AT 20mA
10 μ F
PGND
GND
*C1+ AND C2- MUST BE LEFT UNCONNECTED.
Figure 5. Standard Configuration for Generating an Output
Voltage up to -2 x V IN
8
Figure 6. Alternative Configuration for | V OUT | ≤ V IN
___________________________________
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