参数资料
型号: MAX8723ETE+
厂商: Maxim Integrated Products
文件页数: 8/18页
文件大小: 0K
描述: IC REG FOR LCD DISPLAY 16-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 75
应用: 转换器,LCD
输入电压: 6 V ~ 13.2 V
输出数: 1
输出电压: 3.3V,2 V ~ 3.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-WQFN 裸露焊盘
供应商设备封装: 16-TQFN-EP(4x4)
包装: 管件
产品目录页面: 1411 (CN2011-ZH PDF)
Low-Cost, Internal-Switch, Step-Down
Regulator for LCD Displays
Pin Description
PIN
1
2
3
4
5
NAME
IN
LX
BST
I.C.
OUT
FUNCTION
Step-Down Regulator Input Voltage (6V to 13.2V). Bypass IN to PGND with a minimum 4.7μF ceramic
capacitor close to the IC.
Step-Down Regulator Inductor Connection. Internally connected to the junction of the internal high-side and
low-side MOSFETs.
Step-Down Regulator Bootstrap Capacitor Connection for High-Side Gate Driver. Connect a 0.1μF ceramic
capacitor from BST to LX.
Internal Connection. Make no connection to this pin.
Output Voltage-Sense Input and the Negative Input to the Current-Sense Amplifier. Connect OUT to the step-
down regulator output.
Step-Down Converter Feedback Input:
6
FB
1)
2)
Connect FB to GND for a fixed 3.3V output.
Connect FB to the center tap of a resistive voltage-divider between the step-down regulator output and
GND for an adjustable output from 2.0V to 3.6V.
7
8
9
10
11
12
13
14
15
16
EP
PGND
EXT
INL
VL
VCC
GND
REF
FSEL
SHDN
VCC2
EP
Step-Down Regulator Power Ground
External Synchronous Rectifier Gate Driver Output. To use a synchronous rectifier (optional), connect EXT to
the gate of the external MOSFET. EXT is low in shutdown.
Internal 5V Linear Regulator Supply Input. Bypass INL to GND with a 0.22μF ceramic capacitor close to the IC.
5V Internal Linear Regulator Output. Bypass VL to GND with a 1μF minimum ceramic capacitor. VL is enabled
in shutdown and during faults. See the Linear Regulator (VL) section for further information.
Internal Reference Supply Input. Connect VCC to VL.
Analog Ground
Reference Output. Bypass REF to GND with 0.22μF ceramic capacitor.
Switching Frequency Selection Input. This tri-level logic input sets the SMPS’s switching frequency:
FSEL = GND, f SW = 1.5MHz
FSEL = VCC, f SW = 1.0MHz
FSEL = REF, f SW = 500kHz
Shutdown Control Input. When SHDN is low, the step-down regulator power output is disabled, but REF and
VL remain on.
Connect VCC to VL.
Exposed Backside Pad. For better thermal management, this pad should be soldered to an analog ground
plane connected to sufficient copper through multiple vias.
8
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