参数资料
型号: MAX8740ETB+T
厂商: Maxim Integrated Products
文件页数: 10/12页
文件大小: 0K
描述: IC CONV DC-DC TFT-LCD 10-TDFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: 转换器,TFT,LCD
输入电压: 2.6 V ~ 5.5 V
输出数: 1
输出电压: 2.6 V ~ 28 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-WFDFN 裸露焊盘
供应商设备封装: 10-TDFN-EP(3x3)
包装: 带卷 (TR)
TFT-LCD Step-Up DC-DC Converter
V3
C7
C8
D3
-10V
V2
+28V C9
D2
0.1 μ F 0.1 μ F
C10
0.22 μ F
1 μ F
L1
V IN
2.7 μ H
D1
V OUT
4.5V TO 5.5V
C1
10 μ F
6.3V
R4
10 ?
C5
1 μ F
8
9
6
LX
IN
FREQ
MAX8740
7
LX
2
FB
GND 5
R1
196k ?
1%
R2
20k ?
1%
C2
10 μ F
25V
C7
10 μ F
25V
13.5V/800mA
3
SHDN
GND
4
10
SS
COMP 1
C4
33nF
R3
47k ?
1%
C6
68pF
C3
560pF
Figure 3. Multiple-Output TFT-LCD Power Supply
Multiple-Output Power Supply for TFT LCD
Figure 3 shows a power supply for active-matrix TFT-
LCD flat-panel displays. Output-voltage transient perfor-
mance is a function of the load characteristic. Add or
remove output capacitance (and recalculate compensa-
tion-network component values) as necessary to meet
the required transient performance. Regulation perfor-
mance for secondary outputs (V2 and V3) depends on
the load characteristics of all three outputs.
PC Board Layout and Grounding
Careful PC board layout is important for proper operation.
Use the following guidelines for good PC board layout:
1) Minimize the area of high-current loops by placing
the inductor, rectifier diode, and output capacitors
near the input capacitors and near the LX and GND
pins. The high-current input loop goes from the
positive terminal of the input capacitor to the induc-
tor, to the IC’s LX pin, out of GND, and to the input
capacitor’s negative terminal. The high-current out-
put loop is from the positive terminal of the input
capacitor to the inductor, to the rectifier diode (D1),
and to the positive terminal of the output capacitors,
reconnecting between the output capacitor and
input capacitor ground terminals. Connect these
loop components with short, wide connections.
Avoid using vias in the high-current paths. If vias
are unavoidable, use many vias in parallel to
reduce resistance and inductance.
2) Create a power ground island (PGND) consisting of
the input and output capacitor grounds and GND
pins. Connect all of these together with short, wide
traces or a small ground plane. Maximizing the
width of the power ground traces improves efficien-
cy and reduces output voltage ripple and noise
spikes. Create an analog ground plane (AGND)
consisting of the feedback-divider ground connec-
tion, the COMP and SS capacitor ground connec-
tions, and the device ’s exposed backside pad.
Connect the AGND and PGND islands by connect-
ing the GND pins directly to the exposed backside
pad. Make no other connections between these
separate ground planes.
10
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