参数资料
型号: MAX8759ETI+T
厂商: Maxim Integrated
文件页数: 24/32页
文件大小: 0K
描述: IC CNTRL CCFL BACKLIGHT 28TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: CCFL 控制器
频率: 30 ~ 80 kHz
电流 - 电源: 2.5mA
电源电压: 4.5 V ~ 28 V
工作温度: -40°C ~ 85°C
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-TQFN-EP(5x5)
包装: 带卷 (TR)
Low-Cost, SMBus, CCFL Backlight Controller
The relationships among these 3 control bits can be
thought of as specifying an operating mode for the invert-
er. The defined modes are shown in Table 4. Note that
Table 4. Operating Modes Selected by
Device Control Register Bits 3, 2, and 1
depending on the settings of some bits, other bits have
no effect and are don’t-care bits—they are shown with a
value of X in Table 4. For example, when the ALS_CTL bit
is 1, the value of PWM_SEL has no effect on the operation
of the inverter, so its value is shown as X.
ALSDEL0 and ALSDEL1 set the delay time required
to change the brightness in ALS mode. This delay time is
necessary for smooth transitions during brightness
ALS_CTL
1
1
0
0
0
PWM_MD
1
0
X
1
0
PWM_SEL
X
X
1
0
0
MODE
ALS mode
ALS mode with DPST
PWM mode
SMBus mode
SMBus mode with
DPST
change. Table 5 shows the available delays.
Note that the behavior of register 0x00 (brightness con-
trol register) is affected by certain combinations of the
control bits as shown in Table 4.
Table 5. Delay Time Selected by Device
Control Register Bits 5, 4
When SMBus mode is selected, register 0x00 reflects the
last value written to it. However, when any non-SMBus
mode is selected, register 0x00 reflects the current bright-
ness value based on the current mode of operation.
Fault/Status Register [0x02] (POR = 0x00)
This register has 3 status bits that allow monitoring the
ALSDEL1
1
1
0
0
ALSDEL0
1
0
1
0
DELAY TIME
(ms)
25
15
10
20 (default)
N
PERIODS
5
3
2
4
inverter’s operating state. Bit 0 is a logical OR of open-
lamp fault and overcurrent fault. Bit 2 indicates sec-
ondary/UL overcurrent fault. Bit 3 always indicates the
current lamp on/off status. The value of this bit is one
whenever both lamp 1 and lamp 2 are on. The value of
this bit is zero whenever lamp 1 or lamp 2 is off. The
remaining bits are reserved for future use. All reserved
bits return a zero when read. All the bits in this register
are read only. A write-byte cycle to register 0x02 has
no effect. Write zero to bit 0 of register 0x01 to clear the
fault bit.
BIT 7 (R)
Reserved
BIT 6 (R)
Reserved
BIT 5 (R)
Reserved
BIT 4 (R)
Reserved
BIT 3 (R)
LAMP_STAT
BIT 2 (R)
OV_CURR
BIT 1 (R)
Reserved
BIT 0 (R)
FAULT
LAMP_STAT: Lamp status bit (1 = lamp 1 and lamp 2 are on, 0 = lamp 1 or lamp 2 is off).
OV_CURR: Secondary/UL overcurrent fault (1 = secondary/UL overcurrent fault, 0 = no secondary/UL overcurrent).
FAULT: Fault bit (1 = open-lamp or primary overcurrent fault, 0 = no fault).
24
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