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参数资料
| 型号： | MAX8794ETB+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 7/13页 |
| 文件大小： | 0K |
| 描述： | IC DDR LINEAR REG 10-TDFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 应用： | 转换器，DDR |
| 输入电压： | 1.1 V ~ 3.6 V |
| 输出数： | 1 |
| 输出电压： | 0.5 V ~ 1.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-WFDFN 裸露焊盘 |
| 供应商设备封装： | 10-TDFN-EP（3x3） |
| 包装： | 带卷 (TR) |
Low-Voltage DDR Linear Regulator
Pin Description
PIN
1
2
3
4
5
6
7
8
9
10
—
NAME
REFOUT
V CC
AGND
REFIN
PGOOD
OUTS
SHDN
PGND
OUT
IN
EP
FUNCTION
Buffered Reference Output. The output of the unity-gain reference input buffer sources and sinks over
5mA. Bypass REFOUT to AGND with a 0.33μF or greater ceramic capacitor.
Analog Supply Input. Connect to the system supply voltage (+3.3V). Bypass V CC to AGND with a 1μF or
greater ceramic capacitor.
Analog Ground. Connect the backside pad to AGND.
External Reference Input. REFIN sets the output regulation voltage (V OUTS = V REFIN ).
Open-Drain Power-Good Output. PGOOD is low when the output voltage is more than 150mV (typ) above
or below the regulation point, during soft-start, and when shut down. 2ms after the output reaches the
regulation voltage during startup, PGOOD becomes high impedance.
Output Sense Input. The OUTS regulation level is set by the voltage at REFIN. Connect OUTS to the
remote DDR termination bypass capacitors. OUTS is internally connected to OUT through a 12k ?
resistor.
Shutdown Control Input. Connect to V CC for normal operation. Connect to analog ground to shut down the
linear regulator. The reference buffer remains active in shutdown.
Power Ground. Internally connected to the output sink MOSFET.
Output of the Linear Regulator
Power Input. Internally connected to the output source MOSFET.
Exposed Pad. Connected to a large AGND ground plane with multiple vias to maximize thermal
performance.
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