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| 型号： | MAX8952BEWE+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 16/31页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 2.5A 16WLP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.77 V ~ 1.4 V |
| 输入电压： | 2.5 V ~ 5.5 V |
| 频率 - 开关： | 3.25MHz |
| 电流 - 输出： | 2.5A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-UFBGA，WLCSP |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 16-WLP（2x2） |
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MAX8952
2.5A Step-Down Regulator
with Remote Sense in 2mm x 2mm WLP
SDA
SCL
DATA LINE STABLE DATA VALID
Figure 9. I 2 C Bit Transfer
die temperature in excess of +160°C (typ), the
DC-DC step-down regulator is shut down, allowing the
IC to cool. The DC-DC step-down regulator is turned on
again after the junction cools by 20°C (typ), resulting in
a pulsed output during continuous thermal-overload
conditions.
During thermal overload, the I 2 C interface remains
active and all register values are maintained.
I 2 C Interface
An I 2 C-compatible, 2-wire serial interface controls the
step-down converter output voltage, ramp rate, operat-
ing mode, and synchronization. The serial bus consists
of a bidirectional serial-data line (SDA) and a serial-
clock input (SCL). The master initiates data transfer on
the bus and generates SCL to permit data transfer.
I 2 C is an open-drain bus. SDA and SCL require pullup
resistors (500 ? or greater). Optional (24 ? ) in series
with SDA and SCL protect the device inputs from high-
voltage spikes on the bus lines. Series resistors also
minimize crosstalk and undershoot on bus signals.
Bit Transfer
One data bit is transferred during each SCL clock
cycle. The data on SDA must remain stable during the
high period of the SCL clock pulse (see Figure 9).
Changes in SDA while SCL is high are control signals
(see the START and STOP Conditions section for more
CHANGE OF DATA ALLOWED
bit. The IC supports data transfer rates with SCL fre-
quencies up to 400kHz.
START and STOP Conditions
When the serial interface is inactive, SDA and SCL idle
high. A master device initiates communication by
issuing a START condition. A START condition is a
high-to-low transition on SDA with SCL high. A STOP
condition is a low-to-high transition on SDA, while SCL
is high (Figure 10).
A START condition from the master signals the begin-
ning of a transmission to the IC. The master terminates
transmission by issuing a not acknowledge followed by
SDA
SCL
information).
Each transmit sequence is framed by a START (S) con-
START
CONDITION
STOP
CONDITION
dition and a STOP (P) condition. Each data packet is 9
bits long; 8 bits of data followed by the acknowledge
16
Figure 10. I 2 C START and STOP Conditions
Maxim Integrated
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX8952EWE+T | 功能描述:直流/直流开关调节器 2.5A Step-Down Regulator RoHS:否 制造商:International Rectifier 最大输入电压:21 V 开关频率:1.5 MHz 输出电压:0.5 V to 0.86 V 输出电流:4 A 输出端数量: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:PQFN 4 x 5 |
| MAX8954EWN+ | 制造商:Maxim Integrated Products 功能描述:PMIC FOR PICO PROJECTORS - Rail/Tube |
| MAX8954EWN+T | 制造商:Maxim Integrated Products 功能描述:PMIC FOR PICO PROJECTORS - Tape and Reel |
| MAX8958EWW+ | 制造商:Maxim Integrated Products 功能描述:COMPLETE PMIC FOR INTEL ATOM PROCESSOR-BASED PLATFORM - Rail/Tube |
| MAX8958EWW+T | 制造商:Maxim Integrated Products 功能描述:COMPLETE PMIC FOR INTEL ATOM PROCESSOR-BASED PLATFORM - Tape and Reel 制造商:Maxim Integrated Products 功能描述:COMPLETE POWER MANAGEMENT IC FOR INTEL'S |
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