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| 型号： | MAX9206EAI+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 8/12页 |
| 文件大小： | 0K |
| 描述： | IC DESERIALIZER LVDS 28-SSOP |
| 其它有关文件： | Automotive Product Guide |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 46 |
| 功能： | 解串器 |
| 数据速率： | 660Mbps |
| 输入类型： | LVDS |
| 输出类型： | LVTTL，LVCMOS |
| 输入数： | 1 |
| 输出数： | 10 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 28-SSOP |
| 包装： | 管件 |
| 产品目录页面： | 1424 (CN2011-ZH PDF) |
MAX9206/MAX9208
10-Bit Bus LVDS Deserializers
Pin Description
PIN
NAME
FUNCTION
1, 12, 13
AGND
Analog Ground
2
RCLK_R/
F
Recovered Clock Strobe Edge Select. LVTTL/LVCMOS level input. Drive RCLK_ R/
F high to strobe
ROUT_ on the rising edge of RCLK. Drive RCLK_R/
F low to strobe ROUT_ on the falling edge of
RCLK.
3
REFCLK
PLL Reference Clock. LVTTL/LVCMOS level input.
4, 11
AVCC
Analog Power Supply. Bypass AVCC with a 0.1μF and a 0.001μF capacitor to AGND.
5
RI+
Serial Data Input. Noninverting BLVDS differential input.
6
RI-
Serial Data Input. Inverting BLVDS differential input.
7
PWRDN
Power Down. LVTTL/LVCMOS level input. Drive
PWRDN low to stop the PLL and put ROUT_, LOCK,
and RCLK in high impedance.
8
REN
Output Enable. LVTTL/LVCMOS level input. Drive REN low to put ROUT_ and RCLK in high
impedance.
LOCK remains active, indicating the status of the serial input.
9
RCLK
Recovered Clock. LVTTL/LVCMOS level output. Use RCLK to strobe ROUT_.
10
LOCK
Lock Indicator. LVTTL/LVCMOS level output.
LOCK goes low when the PLL has achieved frequency
and phase lock to the serial input, and the framing bits have been identified.
14, 20,
22
DGND
Digital Ground
15–19,
24–28
ROUT9–
ROUT0
Parallel Output Data. LVTTL/LVCMOS level outputs. ROUT_ is valid on the second selected strobe
edge of RCLK after
LOCK goes low.
21, 23
DVCC
Digital Power Supply. Bypass DVCC with a 0.1μF and a 0.001μF capacitor to DGND.
Figure 1. Worst-Case ICC Test Pattern
0
END
BIT
9
8
7
6
5
4
3
1
0
START
BIT
END
BIT
9
7
6
5
4
3
2
1
2
1
82
START
BIT
TDD
RCLK_R/F = HIGH
START
BIT
RI
RCLK
ODD
ROUT
EVEN
ROUT
Test Circuits/Timing Diagrams
_______________________________________________________________________________________
5
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX9206EAI/V+ | 功能描述:串行器/解串器 - Serdes 10-Bit Bus LVDS Serializer RoHS:否 制造商:Texas Instruments 类型:Deserializer 数据速率:1.485 Gbit/s 输入类型:ECL/LVDS 输出类型:LVCMOS 输入端数量:1 输出端数量:20 工作电源电压:2.375 V to 2.625 V 工作温度范围:0 C to + 70 C 封装 / 箱体:TQFP-64 |
| MAX9206EAI/V+T | 功能描述:串行器/解串器 - Serdes 10-Bit Bus LVDS Serializer RoHS:否 制造商:Texas Instruments 类型:Deserializer 数据速率:1.485 Gbit/s 输入类型:ECL/LVDS 输出类型:LVCMOS 输入端数量:1 输出端数量:20 工作电源电压:2.375 V to 2.625 V 工作温度范围:0 C to + 70 C 封装 / 箱体:TQFP-64 |
| MAX9206EAI+ | 功能描述:串行器/解串器 - Serdes 10-Bit Bus LVDS Serializer RoHS:否 制造商:Texas Instruments 类型:Deserializer 数据速率:1.485 Gbit/s 输入类型:ECL/LVDS 输出类型:LVCMOS 输入端数量:1 输出端数量:20 工作电源电压:2.375 V to 2.625 V 工作温度范围:0 C to + 70 C 封装 / 箱体:TQFP-64 |
| MAX9206EAI+C9F | 制造商:Maxim Integrated Products 功能描述:10-BIT BUS LVDS SERIALIZERS. - Rail/Tube |
| MAX9206EAI+T | 功能描述:串行器/解串器 - Serdes 10-Bit Bus LVDS Serializer RoHS:否 制造商:Texas Instruments 类型:Deserializer 数据速率:1.485 Gbit/s 输入类型:ECL/LVDS 输出类型:LVCMOS 输入端数量:1 输出端数量:20 工作电源电压:2.375 V to 2.625 V 工作温度范围:0 C to + 70 C 封装 / 箱体:TQFP-64 |
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