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参数资料
| 型号： | MAX9248GCM/V+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 9/20页 |
| 文件大小： | 0K |
| 描述： | IC DESERIALIZR LVDS 27BIT 48TQFP |
| 标准包装： | 2,000 |
| 系列： | * |
MAX9248/MAX9250
27-Bit, 2.5MHz to 42MHz
DC-Balanced LVDS Deserializers
______________________________________________________________________________________
17
Staggered and Transition Time
Adjusted Outputs
RGB_OUT[17:0] are grouped into three groups of six, with
each group switching about 1ns apart in the video phase
to reduce EMI and ground bounce. CNTL_OUT[8:0]
switch during the control phase. Output transition times
are slower in the 2.5MHz to 5MHz and 5MHz to 10MHz
ranges and faster in the 10MHz to 20MHz and 20MHz to
42MHz ranges.
Data-Enable Output (DE_OUT)
The MAX9248/MAX9250 deserialize video and control
data at different times. Control data is deserialized during
the video blanking time. DE_OUT high indicates that
video data is being deserialized and output on
RGB_OUT[17:0]. DE_OUT low indicates that control data
is being deserialized and output on CNTL_OUT[8:0].
When outputs are not being updated, the last data
received is latched on the outputs. Figure 18 shows the
DE_OUT timing.
Power-Supply Sequencing of MAX9247
and MAX9248/MAX9250 Video Link
The MAX9247 and MAX9248/MAX9250 video link can
be powered up in several ways. The best approach is
to keep both MAX9247 and MAX9248 powered down
while supplies are ramping up and PCLK_IN of the
MAX9247 and REFCLK of the MAX9248/MAX9250 are
stabilizing. After all of the power supplies of the
MAX9247 and MAX9248/MAX9250 are stable, including
PCLK_IN and REFCLK, do the following:
Power up the MAX9247 first
Wait for at least tLOCK of MAX9247 (or 17100 x tT)
to get activity on the link
Power up the MAX9248
Power-Supply Circuits and Bypassing
There are separate on-chip power domains for digital
circuits and LVTTL/LVCMOS inputs (VCC supply and
GND), outputs (VCCO supply and VCCOGND), PLL
(VCCPLL supply and PLLGND), and the LVDS input
(VCCLVDS supply and LVDSGND). The grounds are iso-
lated by diode connections. Bypass each VCC, VCCO,
VCCPLL, and VCCLVDS pin with high-frequency, sur-
face-mount ceramic 0.1F and 0.001F capacitors in
parallel as close to the device as possible, with the
smallest value capacitor closest to the supply pin. The
outputs are powered from VCCO, which accepts a
1.71V to 3.6V supply, allowing direct interface to inputs
with 1.8V to 3.3V logic levels.
Cables and Connectors
Interconnect for LVDS typically has a differential
impedance of 100
Ω. Use cables and connectors that
have matched differential impedance to minimize
impedance discontinuities.
Twisted-pair and shielded twisted-pair cables offer
superior signal quality compared to ribbon cable and
tend to generate less EMI due to magnetic field cancel-
ing effects. Balanced cables pick up noise as common
mode, which is rejected by the LVDS receiver.
PCLK_OUT
CNTL_OUT
DE_OUT
RGB_OUT
= OUTPUT DATA HELD
CONTROL DATA
VIDEO DATA
PCLK_OUT TIMING SHOWN FOR R/F = HIGH (RISING OUTPUT LATCH EDGE)
Figure 18. Output Timing
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX9249 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:Gigabit Multimedia Serial Link Serializer with LVDS System Interface |
| MAX9249_12 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:Gigabit Multimedia Serial Link Serializer with LVDS System Interface |
| MAX9249EVKIT+ | 功能描述:界面开发工具 MAX9249 Eval Kit RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
| MAX9249GCM/V+ | 功能描述:串行器/解串器 - Serdes GSML Serializer w/LVDS Interface RoHS:否 制造商:Texas Instruments 类型:Deserializer 数据速率:1.485 Gbit/s 输入类型:ECL/LVDS 输出类型:LVCMOS 输入端数量:1 输出端数量:20 工作电源电压:2.375 V to 2.625 V 工作温度范围:0 C to + 70 C 封装 / 箱体:TQFP-64 |
| MAX9249GCM/V+T | 功能描述:串行器/解串器 - Serdes GSML Serializer w/LVDS Interface RoHS:否 制造商:Texas Instruments 类型:Deserializer 数据速率:1.485 Gbit/s 输入类型:ECL/LVDS 输出类型:LVCMOS 输入端数量:1 输出端数量:20 工作电源电压:2.375 V to 2.625 V 工作温度范围:0 C to + 70 C 封装 / 箱体:TQFP-64 |
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