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| 型号： | MAX9316EWP+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 9/12页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK BUFFER MUX 2:5 20-SOIC |
| 标准包装： | 1,000 |
| 类型： | 扇出缓冲器（分配），多路复用器 |
| 电路数： | 1 |
| 比率 - 输入:输出： | 2:5 |
| 差分 - 输入:输出： | 是/是 |
| 输入： | HSTL，LVECL，LVPECL |
| 输出： | LVECL，LVPECL |
| 频率 - 最大： | 1.5GHz |
| 电源电压： | 3 V ~ 3.8 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 20-SOIC W |
| 包装： | 带卷 (TR) |
MAX9316
Detailed Description
The MAX9316 is a low-skew, 1-to-5 differential driver
designed for clock or data distribution. A 2-to-1 MUX
selects one of the two clock inputs, CLK, CLK and
SCLK. The CLK and CLK input is differential while the
SCLK is single ended. The MUX is switched by the sin-
gle-ended SEL input. A logic low selects the CLK input
and a logic high selects the SCLK input. The SEL logic
threshold is set by the internal voltage reference VBB.
SEL input can be driven by VCC and VEE or by a single-
ended LVPECL/LVECL signal. The selected input is
reproduced at five differential outputs, Q0 to Q4.
Synchronous Enable
The MAX9316 is synchronously enabled and disabled
with outputs in the low state to eliminate shortened
clock pulses. EN is connected to the input of an edge-
triggered D flip-flop. After power-up, drive EN low and
toggle the selected clock input to enable the outputs.
The outputs are enabled on the falling edge of the
selected clock input after EN goes low. The outputs are
disabled to a low state on the falling edge of the select-
ed clock input after EN goes high. The threshold for EN
is equal to VBB.
Supply
For interfacing to differential HSTL and LVPECL signals,
the VCC range is from +3.0 to +3.8V (with VEE ground-
1:5 Differential LVPECL/LVECL/HSTL
Clock and Data Driver
6
_______________________________________________________________________________________
Pin Description
PIN
NAME
FUNCTION
1
Q0
Noninverting Q0 Output. Typically terminate with 50
resistor to (VCC - 2V).
2
Q0
Inverting Q0 Output. Typically terminate with 50
resistor to (VCC - 2V).
3
Q1
Noninverting Q1 Output. Typically terminate with 50
resistor to (VCC - 2V).
4
Q1
Inverting Q1 Output. Typically terminate with 50
resistor to (VCC - 2V).
5
Q2
Noninverting Q2 Output. Typically terminate with 50
resistor to (VCC - 2V).
6
Q2
Inverting Q2 Output. Typically terminate with 50
resistor to (VCC - 2V).
7
Q3
Noninverting Q3 Output. Typically terminate with 50
resistor to (VCC - 2V).
8
Q3
Inverting Q3 Output. Typically terminate with 50
resistor to (VCC - 2V).
9
Q4
Noninverting Q4 Output. Typically terminate with 50
resistor to (VCC - 2V).
10
Q4
Inverting Q4 Output. Typically terminate with 50
resistor to (VCC - 2V).
11
VEE
Negative Supply Voltage
12
SEL
Clock Select Input (Single Ended). Drive low to select the CLK, CLK input. Drive high to select the
SCLK input. The SEL threshold is equal to VBB. Internal 60k
pulldown to VEE.
13
VBB
Reference Output Voltage. Connect to the inverting or noninverting clock input to provide a
reference for single-ended operation. When used, bypass with a 0.01F ceramic capacitor to VCC;
otherwise, leave it unconnected.
14
CLK
Inverting Differential Clock Input. Internal 75k
pullup to VCC and 75k pulldown to VEE.
15
CLK
Noninverting Differential Clock Input. Internal 75k
pulldown to VEE.
16
SCLK
Single-Ended Clock Input. Internal 75k
pulldown to VEE.
17
NC
Not Internally Connected. Solder to PC board for package thermal dissipation.
18, 20
VCC
Positive Supply Voltage. Bypass VCC to VEE with 0.1F and 0.01F ceramic capacitors. Place the
capacitors as close to the device as possible with the smaller value capacitor closest to the device.
19
EN
Output Enable Input. Outputs are synchronously enabled on the falling edge of the clock input
when EN is low. Outputs are synchronously set to low on the falling edge of the clock input when
EN is high. Internal 60k
pulldown to VEE.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX9317AECJ | 功能描述:时钟缓冲器 RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| MAX9317AECJ+ | 功能描述:时钟缓冲器 RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| MAX9317AECJ+T | 功能描述:时钟缓冲器 RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| MAX9317AETJ | 功能描述:时钟缓冲器 RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| MAX9317AETJ+ | 功能描述:时钟缓冲器 RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
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