参数资料
型号: MAX9406ETM+T
厂商: Maxim Integrated Products
文件页数: 7/11页
文件大小: 0K
描述: IC DVI/HDMI LVL SHIFTR 48TQFN-EP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 电平移位器
应用: 基站
安装类型: 表面贴装
封装/外壳: 48-WFQFN 裸露焊盘
供应商设备封装: 48-TQFN-EP(7x7)
包装: 带卷 (TR)
MAX9406
DisplayPort to DVI/HDMI Level Shifter
_______________________________________________________________________________________
5
Pin Description
PIN
32-PIN
TQFN
48-PIN
TQFN
NAME
FUNCTION
1, 3, 8, 18,
22
1, 5, 12, 18,
24, 27, 31,
36, 37,43
GND
Ground
2, 7, 24
2, 11, 15,
21, 26, 33,
40, 46
VCC
Power-Supply Input. Bypass VCC to GND with 0.1F and 0.01F capacitors as close to
the supply pins as possible.
3, 4, 6, 10,
34, 35
N.C.
No Connection. Not internally connected; leave unconnected.
4
7
HPD_SRC
Hot-Plug Detection at 3.3V Logic
5
8
SDA_SRC
Serial Data Line. I
2C data line at 3.3V logic.
6
9
SCL_SRC
Serial Clock Line. I
2C clock line at 3.3V logic.
9
13
OUT_D4+
Differential Output Port 4+
10
14
OUT_D4-
Differential Output Port 4-
11
16
OUT_D3+
Differential Output Port 3+
12
17
OUT_D3-
Differential Output Port 3-
13
19
OUT_D2+
Differential Output Port 2+
14
20
OUT_D2-
Differential Output Port 2-
15
22
OUT_D1+
Differential Output Port 1+
16
23
OUT_D1-
Differential Output Port 1-
17
25
OE
Output Enable. Drive
OE low to enable the outputs. Drive OE high to disable the outputs.
19
28
SCL_SNK
Serial Clock Line. I
2C clock line at 5V logic.
20
29
SDA_SNK
Serial Data Line. I
2C data line at 5V logic.
21
30
HPD_SNK
Hot-Plug Detection at +5V Logic
23
32
DDC_EN
DDC Link Enable
25
38
IN_D1-
Differential Input Port 1-
26
39
IN_D1+
Differential Input Port 1+
27
41
IN_D2-
Differential Input Port 2-
28
42
IN_D2+
Differential Input Port 2+
29
44
IN_D3-
Differential Input Port 3-
30
45
IN_D3+
Differential Input Port 3+
31
47
IN_D4-
Differential Input Port 4-
32
48
IN_D4+
Differential Input Port 4+
EP
Exposed Paddle. Connect EP to ground.
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