参数资料
型号: MAX9595CTM+T
厂商: Maxim Integrated Products
文件页数: 5/28页
文件大小: 0K
描述: IC AUDIO/VIDEO SWIT DUAL 48TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
功能: 音频/视频切换
电路: 2 x SCART
电压电源: 单/双电源
电压 - 电源,单路/双路(±): 4.75 V ~ 5.25 V,±11.4 V ~ 12.6 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 48-WFQFN 裸露焊盘
供应商设备封装: 48-TQFN-EP(7x7)
包装: 带卷 (TR)
Video Outputs
The DC level at the video outputs is controlled so that
coupling capacitors are not required, and all of the
video outputs are capable of driving a DC-coupled,
150, back-terminated coax load with respect to
ground. In a typical television input circuit (see Figure 3),
the video output driver on the SCART chip only needs
to source current. Users should note that, while the
SCART specification states 75 impedance, in prac-
tice, typical SCART chip implementations assume 75
input resistance to ground (and source current from the
video output stage). Since some televisions and VCRs
use the horizontal sync height for automatic gain con-
trol, the MAX9595 accurately reproduces the sync
height to within ±2%.
Slow Switching
The MAX9595 supports the IEC 933-1, Amendment 1,
tri-level slow switching that selects the aspect ratio for
the display (TV). Under I2C-compatible control, the
MAX9595 sets the slow-switching output voltage level.
Table 1 shows the valid input levels of the slow-switch-
ing signal and the corresponding operating modes of
the display device.
Two bidirectional ports are available for slow-switching
signals for the TV and VCR. The slow-switching input
status is continuously read and stored in register 0Eh.
The slow-switching outputs can be set to a logic level
or high impedance by writing to registers 07h and 09h.
See Tables 8 and 10 for details. When enabled, INTER-
RUPT_OUT becomes high impedance if the voltage
level changes on TV_SS or VCR_SS.
Fast Switching
The VCR or MPEG decoder outputs a fast-switching
signal to the display device or TV to insert on-screen
display (OSD). The fast-switching signal can also be
set to a constant high or low output signal through the
I2C interface. The fast-switching output can be set
through writing to register 07h.
Y/C Mixer
The MAX9595 includes an on-chip mixer to produce
composite video (CVBS) when S-video (Y and C) is pre-
sent. The composite video drives the RF_CVBS_OUT
output pin. The circuit sums Y and C signals to obtain the
CVBS component. A +6dB output buffer drives
RF_CVBS_OUT.
Video Reconstruction Filter
The encoder DAC outputs need to be lowpass-filtered
to reject the out-of-band noise. The MAX9595 inte-
grates the reconstruction filter. The filter is fourth order,
which is composed of two Sallen-Key biquad in cas-
cade, implementing a Butterworth-type transfer func-
tion. The internal reconstruction filters feature a 5.5MHz
cutoff frequency, and -30dB minimum attenuation at
27MHz. Note that the SET pin is used to set the accura-
cy of the filter cutoff frequency. Connect a 100k resis-
tor from SET to ground.
SCART Audio Switching
Audio Inputs
The audio block has three stereo audio inputs from the
TV, the VCR, and the MPEG decoder SCART. Each input
has a 100k resistor connected to an internally generat-
ed voltage equal to 0.23 x V12, and is AC-coupled.
MAX9595
Audio/Video Switch for Dual SCART Connector
______________________________________________________________________________________
13
Table 1. Slow-Switching Modes
SLOW-SWITCHING
SIGNAL VOLTAGE
(V)
MODE
0 to 2
Display device uses an internal source
such as a built-in tuner to provide a
video signal
4.5 to 7.0
Display device uses a video signal from
the SCART connector and sets the
display to 16:9 aspect ratio
9.5 to 12.6
Display device uses a signal from the
SCART connector and sets the display
to 4:3 aspect ratio
MAX9595
SET-TOP BOX
TV
+5V
VIDEO
OUTPUT
DC
RESTORE
SCART
CABLE
0.1F
5k
75
INPUT
TERMINATION
RESISTOR
75
BACK
TERMINATION
RESISTOR
Figure 3. Typical TV Input Current
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