参数资料
型号: MAX9750CETI+
厂商: Maxim Integrated Products
文件页数: 14/30页
文件大小: 0K
描述: IC AMP AUDIO PWR 2.6W AB 28TQFN
标准包装: 60
系列: DirectDrive®
类型: AB 类
输出类型: 2-通道(立体声)带立体声耳机
在某负载时最大输出功率 x 通道数量: 2.2W x 2 @ 3 欧姆; 110mW x 2 @ 16 欧姆
电源电压: 4.5 V ~ 5.5 V
特点: 消除爆音,短路保护和热保护,关机,音量控制
安装类型: 表面贴装
供应商设备封装: 28-TQFN-EP(5x5)
封装/外壳: 28-WFQFN 裸露焊盘
包装: 管件
MAX9750/MAX9751/MAX9755
2.6W Stereo Audio Power Amplifiers and
DirectDrive Headphone Amplifiers
______________________________________________________________________________________
21
Thermal-overload protection limits total power dissipa-
tion in these devices. When the junction temperature
exceeds +160°C, the thermal-protection circuitry dis-
ables the amplifier output stage. The amplifiers are
enabled once the junction temperature cools by 15°C.
This results in a pulsing output under continuous ther-
mal-overload conditions as the device heats and cools.
Output Power (Headphone Amplifier)
The headphone amplifiers have been specified for the
worst-case scenario—when both inputs are in phase.
Under this condition, the drivers simultaneously draw
current from the charge pump, leading to a slight loss in
headroom of VSS. In typical stereo audio applications,
the left and right signals have differences in both magni-
tude and phase, subsequently leading to an increase in
the maximum attainable output power. Figure 10 shows
the two extreme cases for in and out of phase. In reality,
the available power lies between these extremes.
Power Supplies
The MAX9750/MAX9751/MAX9755 have different sup-
plies for each portion of the device, allowing for the opti-
mum combination of headroom and power dissipation
and noise immunity. The speaker amplifiers are pow-
ered from PVDD. PVDD ranges from 4.5V to 5.5V. The
headphone amplifiers are powered from HPVDD and
VSS. HPVDD is the positive supply of the headphone
amplifiers and ranges from 3V to 5.5V. VSS is the nega-
tive supply of the headphone amplifiers. Connect VSS to
CPVSS. The charge pump is powered by CPVDD.
CPVDD ranges from 3V to 5.5V and should be the same
potential as HPVDD. The charge pump inverts the volt-
age at CPVDD, and the resulting voltage appears at
CPVSS. The remainder of the device is powered by VDD.
Component Selection
Input Filtering
The input capacitor (CIN), in conjunction with the ampli-
fier input resistance (RIN), forms a highpass filter that
removes the DC bias from an incoming signal (see the
Block Diagrams). The AC-coupling capacitor allows the
amplifier to bias the signal to an optimum DC level.
Assuming zero source impedance, the -3dB point of
the highpass filter is given by:
RIN is the amplifier’s internal input resistance value
given in the
Electrical Characteristics table. Choose CIN
such that f-3dB is well below the lowest frequency of
interest. Setting f-3dB too high affects the amplifier’s
low-frequency response. Use capacitors with low-volt-
age coefficient dielectrics, such as tantalum or alu-
minum electrolytic. Capacitors with high-voltage
coefficients, such as ceramics, may result in increased
distortion at low frequencies.
BIAS Capacitor
BIAS is the output of the internally generated DC bias
voltage. The BIAS bypass capacitor, CBIAS, improves
PSRR and THD+N by reducing power supply and other
noise sources at the common-mode bias node, and
also generates the clickless/popless, startup/shutdown
DC bias waveforms for the speaker amplifiers. Bypass
BIAS with a 1F capacitor to GND.
Charge-Pump Capacitor Selection
Use capacitors with an ESR less than 100m
Ω for opti-
mum performance. Low-ESR ceramic capacitors mini-
mize the output resistance of the charge pump. For
best performance over the extended temperature
range, select capacitors with an X7R dielectric. Table 4
lists suggested manufacturers.
Flying Capacitor (C1)
The value of the flying capacitor (C1) affects the load
regulation and output resistance of the charge pump. A
C1 value that is too small degrades the device’s ability
to provide sufficient current drive, which leads to a loss
of output voltage. Increasing the value of C1 improves
load regulation and reduces the charge-pump output
resistance to an extent. See the Output Power vs.
Charge-Pump Capacitance and Load Resistance
graph in the
Typical Operating Characteristics. Above
2.2F, the on-resistance of the switches and the ESR of
C1 and C2 dominate.
Output Capacitor (C2)
The output capacitor value and ESR directly affect the
ripple at CPVSS. Increasing the value of C2 reduces
output ripple. Likewise, decreasing the ESR of C2
f
RC
dB
IN IN
=
3
1
2
π
SUPPLIER
PHONE
FAX
WEBSITE
Taiyo Yuden
800-348-2496
847-925-0899
www.t-yuden.com
TDK
807-803-6100
847-390-4405
www.component.tdk.com
Table 4. Suggested Capacitor Manufacturers
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