参数资料
型号: MAX9770EUI+T
厂商: Maxim Integrated Products
文件页数: 9/22页
文件大小: 0K
描述: IC AMP AUDIO 1.2W MONO D 28TSSOP
标准包装: 2,500
类型: D 类
输出类型: 1-通道(单声道),带立体声耳机
在某负载时最大输出功率 x 通道数量: 1.2W x 1 @ 8 欧姆; 80mW x 2 @ 16 欧姆
电源电压: 2.5 V ~ 5.5 V
特点: 消除爆音,输入多路复用器,静音,短路和热保护,关机
安装类型: 表面贴装
供应商设备封装: 28-TSSOP
封装/外壳: 28-TSSOP(0.173",4.40mm 宽)
包装: 带卷 (TR)
Although this movement is small, a speaker not designed
to handle the additional power may be damaged. For
optimum results, use a speaker with a series inductance
>10H. Typical small 8
Ω speakers exhibit series induc-
tances in the range of 20H to 100H.
Output Offset
Unlike Class AB amplifiers, the output offset voltage of a
Class D amplifier does not noticeably increase quiescent
current draw when a load is applied. This is due to the
power conversion of the Class D amplifier. For example, a
15mV DC offset across an 8
Ω load results in 1.9mA extra
current consumption in a Class AB device. In the Class D
case, a 15mV offset into 8
Ω equates to an additional
power drain of 28W. Due to the high efficiency of the
Class D amplifier, this represents an additional quiescent
current draw of 28W/(VDD / 100 x
η), which is on the
order of a few microamps.
Power Supplies
The MAX9770 has different supplies for each portion of
the device, allowing for the optimum combination of
headroom and power dissipation and noise immunity.
The speaker amplifier is powered from PVDD. PVDD
ranges from 2.5V to 5.5V. The headphone amplifiers
are powered from VDD and SVSS. VDD is the positive
supply of the headphone amplifiers and ranges from
2.5V to 5.5V. SVSS is the negative supply of the head-
phone amplifiers. Connect SVSS to CPVSS. The charge
pump is powered by CPVDD. CPVDD ranges from 2.5V
to 5.5V and should be the same potential as VDD. The
charge pump inverts the voltage at CPVDD, and the
resulting voltage appears at CPVSS. The remainder of
the device is powered by VDD.
Component Selection
Input Filter
The input capacitor (CIN), in conjunction with the ampli-
fier input resistance (RIN), forms a highpass filter that
removes the DC bias from an incoming signal (see the
Block Diagram). The AC-coupling capacitor allows the
amplifier to bias the signal to an optimum DC level.
Assuming zero-source impedance, the -3dB point of
the highpass filter is given by:
RIN is the amplifier’s internal input resistance value
given in the
Electrical Characteristics. Be aware that
the MONO input has a lower input impedance than the
other inputs. Choose CIN such that f-3dB is below the
lowest frequency of interest. Setting f-3dB too high
affects the amplifier’s low-frequency response. Setting
f-3dB too low can affect the click-and-pop performance.
Use capacitors with low-voltage coefficient dielectrics,
such as tantalum or aluminum electrolytic. Capacitors
with high-voltage coefficients, such as ceramics, may
result in increased distortion at low frequencies.
Output Filter
The MAX9770 speaker amplifier does not require an out-
put filter for normal operation and audio reproduction. The
device passes FCC Class B radiated emissions stan-
dards with 100mm of unshielded speaker cables.
However, output filtering can be used if a design is failing
radiated emissions due to board layout or cable length,
or if the circuit is near EMI-sensitive devices. Use a com-
mon-mode choke connected in series with the speaker
outputs if board space is limited and emissions are a
concern. Use of an LC filter is necessary if excessive
speaker cable is used.
BIAS Capacitor
BIAS is the output of the internally generated DC bias
voltage. The BIAS bypass capacitor, CBIAS improves
PSRR and THD+N by reducing power supply and other
noise sources at the common-mode bias node, and
also generates the clickless/popless, startup/shutdown
DC bias waveforms for the speaker amplifiers. Bypass
BIAS with a 0.047F capacitor to GND.
f
RC
dB
IN IN
=
3
1
2
π
MAX9770
1.2W, Low-EMI, Filterless, Mono Class D Amplifier
with Stereo DirectDrive Headphone Amplifiers
______________________________________________________________________________________
17
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