参数资料
型号: MAX9867ETJ+T
厂商: Maxim Integrated Products
文件页数: 40/55页
文件大小: 0K
描述: IC STEREO AUD CODEC LP 32TQFN-EP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 立体声音频
数据接口: I²C,串行
分辨率(位): 18 b
ADC / DAC 数量: 2 / 2
三角积分调变:
动态范围,标准 ADC / DAC (db): 85 / 90
电压 - 电源,模拟: 1.65 V ~ 1.95 V
电压 - 电源,数字: 1.65 V ~ 1.95 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-WFQFN 裸露焊盘
供应商设备封装: 32-TQFN-EP(5x5)
包装: 带卷 (TR)
MAX9867
Ultra-Low Power Stereo Audio Codec
______________________________________________________________________________________
45
Power Management
The MAX9867 includes complete power management
control to minimize power usage. The DAC and both
ADC can be independently enabled so that only the
required circuitry is active. Toggle the SHDN bit when-
ever a configuration change is made. Table 17 is the
power-management register.
Table 17. Power-Management Register
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
REGISTER
ADDRESS
System Shutdown
SHDN
LNLEN
LNREN
0
DALEN
DAREN
ADLEN
ADREN
0x17
BITS
FUNCTION
SHDN
Shutdown
Places the device in low-power shutdown mode.
LNLEN
Left-Line Input Enable
Enables the left-line input preamp and automatically enables the left and right headphone amplifiers.
If LNREN = 0, the left-line input signal is also routed to the right ADC input mixer and right headphone
amplifier.
Note: Control of the right headphone amplifier can be overridden by HPMODE.
LNREN
Right-Line Input Enable
Enables the right-line input preamp and automatically enables the right headphone amplifier.
Note: Control of the right headphone amplifier can be overridden by HPMODE.
DALEN
Left DAC Enable
Enables the left DAC and automatically enables the left and right headphone amplifiers. If DAREN = 0, the
left DAC signal is also routed to the right headphone amplifier.
Note: Control of the right headphone amplifier can be overridden by HPMODE.
DAREN
Right DAC Enable
Enabling the right DAC must be done in the same I2C write operation that enables the left DAC. Right
DAC operation requires DALEN = 1.
ADLEN
Left ADC Enable
ADREN
Right ADC Enable
Enabling the right ADC must be done in the same I2C write operation that enables the left ADC. The right
ADC can be enabled while the left ADC is running if used for DC measurements. SHDN must be toggled
to disable the right ADC in this case. Right ADC operation requires ADLEN = 1.
Revision Code
The MAX9867 includes a revision code to allow easy
identification of the device revision. The revision code is
0x42. See Table 18 for the revision code register.
Table 18. Revision Code Register
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
REGISTER
ADDRESS
Revision
REV
0xFF
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