参数资料
型号: MAX9987ETP+
厂商: Maxim Integrated
文件页数: 10/12页
文件大小: 0K
描述: IC BUFFER/SPLITTER LO 20-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 60
功能: LO 缓冲器/分路器
频率: 700MHz ~ 1.1GHz
RF 型: 手机,GSM,DCS,PCS,UMTS
次要属性: 40dB 反向隔离
封装/外壳: 20-WQFN 裸露焊盘
包装: 管件
+14dBm to +20dBm LO Buffers/Splitters
with ±1dB Variation
Table 1. External Resistor Values for +14dBm to +20dBm Output Power
NOMINAL
MAX9987
MAX9988
OUTPUT POWER
R 1 ( ? )
R 2 ( ? )
R 4 ( ? )
R 5 ( ? )
INPUT DRIVE
INPUT DRIVE
(dBm)
(dBm)
(dBm)
+20
+19
+18
+17
+16
+15
+14
1.35k
2.2k
5.0k
Open
Open
Open
Open
2.0k
3.0k
6.0k
Open
Open
Open
Open
Open
Open
Open
Open
1.8k
0.9k
0.6k
Open
Open
Open
Open
3.0k
1.1k
0.6k
10 ±3
9 ±3
8 ±3
7 ±3
6 ±3
5 ±3
4 ±3
12 ±3
11 ±3
10 ±3
9 ±3
8 ±3
7 ±3
6 ±3
Table 2. Component Values for Typical
Application Circuit
COMPONENT VALUE
Input Drive Level
In the case of the MAX9987, the typical required input
drive level is +7dBm for +17dBm output, or +10dBm for
+20dBm output. The MAX9988 uses slightly higher
input levels (see Table 1). The typical VCO cannot pro-
DESIGNATION
C1, C6
C3
C2, C4, C5, C7, C8,
C9, C12, C13, C14
C10, C11
R1, R2, R4, R5
R3
MAX9987
(LOWBAND)
100nF
100pF
47pF
5pF
See Table 1
100 ?
MAX9988
(HIGHBAND)
100nF
100nF
22pF
10pF
See Table 1
100 ?
vide sufficient drive by itself; the typical application fol-
lows the VCO with attenuation (about +3dB), and then
with a low-noise gain block. This allows the VCO to
drive the MAX9987/MAX9988 input at the required level
without being load-pulled.
Output Drive Level
The output drive of the MAX9987/MAX9988 is nominally
+17dBm ±1dB. This is the typical application, with no
external bias-setting resistors at INBIAS and OUTBIAS.
Output power can be set from +14dBm to +20dBm by
using the bias-setting resistor values listed in Table 1.
Driver Amplifiers and Outputs
Each of the output amplifiers are similar to the input
amplifier, except they are biased higher to provide more
output power. For example, with an input power of
+10dBm, the MAX9987 can deliver +20dBm at both out-
puts. The bias is adjustable; see Table 1 for details.
Both RF outputs are internally matched to 50 ? , with a
typical VSWR limit of 2:1. Provide DC blocking capacitors
at the outputs.
Applications Information
Layout Considerations
A properly designed PC board is an essential part of
any RF/microwave circuit. Keep RF signal lines as short
as possible to reduce losses, radiation, and induc-
tance. For best performance, route the ground pin
traces directly to the exposed pad underneath the
package. This pad must be connected to the ground
plane of the board by using multiple vias under the
device to provide the best RF/thermal conduction path.
Solder the exposed pad on the bottom of the device
package to a PC board exposed pad.
Input and Output Matching
All input and output matching is accomplished on-chip;
no external matching circuitry is required. Use a DC
block of about 47pF (lowband) or 22pF (highband) at the
input and the outputs. Because these parts are internally
broadband matched, adjusting external component
values can optimize performance for a particular band.
TRANSISTOR COUNT: 89
PROCESS: BiCMOS
Chip Information
10
______________________________________________________________________________________
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