参数资料
型号: MB8504S064AF-84
厂商: Fujitsu Limited
英文描述: CMOS 4M×64Bit Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 4M×64位 同步动态RAM)
中文描述: 4米× 64位的CMOS同步动态随机存取存储器(SDRAM)的CMOS(4分× 64位同步动态RAM)的
文件页数: 9/20页
文件大小: 388K
代理商: MB8504S064AF-84
9
MB8504S064AF-100/-84/-67
I
DC CHARACTERISTICS
(At recommended operating conditions unless otherwise noted.)
Notes:
*1. I
CC
depends on the output termination, load conditions, clock cycle rate and signal clock rate.
The specified values are obtained with the output open and no termination register.
*2. Voltages referenced to V
SS
(= 0 V)
*3. An initial pause (DESL on NOP) of 200
μ
s is required after power-on followed by a minimum of eight
Auto-refresh cycles.
*4. Values except I
CC2P
are for when one side of the double-sided module is in standby mode and the other
side has two banks active in burst mode.
*5. DC characteristics is the Serial PD standby state (V
IN
= GND or V
CC
).
Parameter
Notes
Symbol
Condition
Value
Unit
Min.
Max.
920
Operating Current
(Average Power
Supply Current)
*1
MB8504S064AF-100
I
CC1S
No Burst;
t
CK
= min
t
RC
= min
One Bank Active
mA
MB8504S064AF-84
880
mA
MB8504S064AF-67
840
mA
MB8504S064AF-100
I
CC1D
No Burst;
t
CK
= min
t
RC
= min
All Banks Active
1280
mA
MB8504S064AF-84
1200
mA
MB8504S064AF-67
1120
mA
Precharge Standby
Current (Power
Supply Current)
*1
I
CC2P
CKE = V
IL
, t
CK
= min
All Banks Idle
32
mA
I
CC2N
CKE = V
IH
, t
CK
= min
All Banks Idle
480
mA
Active Standby
Current (Power
Supply Current)
*1
I
CC3P
CKE = V
IL
, t
CK
= min
Any Bank Active
480
mA
I
CC3N
CKE = V
IH
, t
CK
= min
Any Bank Active
640
mA
Burst Mode Current
(Average Power
Supply Current)
*1
MB8504S064AF-100
I
CC4
t
CK
= min
1320
mA
MB8504S064AF-84
1240
mA
MB8504S064AF-67
1160
mA
Auto-refresh Current
(Average Power
Supply Current)
*1
MB8504S064AF-100
I
CC5
Auto Refresh
t
CK
= min
t
RC
= min
t
RRD
= min
1360
mA
MB8504S064AF-84
1280
mA
MB8504S064AF-67
1200
mA
Self-refresh Current
(Average Power Supply Current)
I
CC6
CKE = V
IL
32
mA
Input Leakage Current (All Inputs)
I
I (L)
0 V
V
IN
V
CC
All other pins not
under test = 0 V
3.0 V
V
CC
3.6 V
Output is disabled (Hi-Z)
0 V
V
OUT
V
CC
3.0 V
V
CC
3.6 V
–80
80
μ
A
Output Leakage Current
I
O (L)
–20
20
μ
A
LVTTL Output
High Voltage
*2
V
OH
I
OH
= –2.0 mA
2.4
V
LVTTL Output
Low Voltage
*2
V
OL
I
OL
= +2.0 mA
0.4
V
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