5
6.5.1 Tiling...................................................................................................................................70
6.5.2 Alpha Blending...................................................................................................................71
6.5.3 Logical Calculation.............................................................................................................71
6.5.4 Hidden Surface Management............................................................................................72
6.6
Drawing Attributes ........................................................................................................73
6.6.1 Line Draw Attributes ..........................................................................................................73
6.6.2 Triangle Draw Attributes ....................................................................................................73
6.6.3 Texture Attributes...............................................................................................................74
6.6.4 Character/Font Drawing and BLT Attributes......................................................................74
6.7
Display List ...................................................................................................................75
6.7.1 Overview............................................................................................................................75
6.7.2 Header Format...................................................................................................................76
6.7.3 Display List Command Overview.......................................................................................77
6.7.4 Details of Display List Commands.....................................................................................81
7
Registers...............................................................................................................................93
7.1
Description....................................................................................................................93
7.1.1 Host Interface Registers ....................................................................................................94
7.1.2 Graphics Memory Interface Registers...............................................................................98
7.1.3 Display Control Register..................................................................................................101
7.1.4 Draw Control Registers....................................................................................................124
7.1.5 Draw mode Parameter Registers ....................................................................................127
7.1.6 Triangle Draw Registers ..................................................................................................141
7.1.7 Line Draw Registers ........................................................................................................144
7.1.8 Pixel Plot Registers..........................................................................................................145
7.1.9 Rectangle Draw Registers...............................................................................................146
7.1.10 Blt Registers...................................................................................................................147
7.1.11 Fast2DLine Draw Registers...........................................................................................148
7.1.12 Fast2DTriangle Draw Registers.....................................................................................149
7.1.12 DisplayList FIFO Registers............................................................................................149
8
Timing Diagram ..................................................................................................................150
8.1
Host Interface .............................................................................................................150
8.1.1 CPU Read/Write Timing Diagram for SH3 Mode ........................................................................150
8.1.2 CPU Read/Write Timing Diagram for SH4 Mode ........................................................................151
8.1.3 CPU Read/Write Timing Diagram in V832 Mode ........................................................................152
8.1.4 SH4 Single-address DMA Write (Transfer of 1 Long Word)........................................................153
8.1.5 SH4 Single-address DMA Write (Transfer of 8 Long Words)......................................................154
8.1.6 SH3/4 Dual-address DMA (Transfer of 1 Long Word).................................................................155
8.1.7 SH3/4 Dual-Address DMA (Transfer of 8 Long Words) ..............................................................156
8.1.8 V832 DMA Transfer.........................................................................................................157
SH4 Single-address DMA Transfer End Timing ........................................................................158
8.1.10 SH3/4 Dual-address DMA Transfer End Timing............................................................159
8.1.11 V832 DMA Transfer End Timing....................................................................................160
8.2
Graphics Memory Interface........................................................................................161
8.2.1 Timing of Read Access to Same Row Address...............................................................161
8.2.2 Timing of Read Access to Different Row Addresses.......................................................162
8.2.3 Timing of Write Access to Same Row Address...............................................................163
8.2.4 Timing of Write Access to Different Row Addresses.......................................................164