参数资料
型号: MB86330CR-ES
厂商: FUJITSU LTD
元件分类: 数字信号处理
英文描述: 16-bit Fixed-point DSP
中文描述: 16-BIT, 25 MHz, OTHER DSP, CPGA256
封装: CERAMIC, PGA-256
文件页数: 7/46页
文件大小: 590K
代理商: MB86330CR-ES
7
MB86330
I
PIN DESCRIPTION
(Continued)
Pin no.
Pin name
Bit
I/O
Active
Pull up
or
pull down
Function
114
MCLK
1
I
Master clock input
173
PM
1
I
Pull up
Internal master clock input can be selected.
0: MCLK, 1: PLL output
172
PSTOP
1
I
H
PLL operation setup
0: PLL operation, 1: PLL stop
50,
116,
175
MOD
[2:0]
3
I
Pull down
Operating mode
21,
91
WMD
[1:0]
2
I
Pull down
External memory WAIT mode
174
F1
1
I
Flag input 1 (level sense)
49
F0
1
I
Flag input 0 (level sense)
177
XRST
1
I
L
Reset input
222
SCKOUT
1
O
Internal system clock output
44
SCZC
1
I
H
Pull down
Hi-z control over SCKOOUT, POUT and EA
[15:0] (SCZC = “L”)
151
BOOT
1
I
H
Input for a BOOT mode control signal
89
BTACT
1
O
H
Output for a BOOT mode status indication
signal
19,
205
PAGE
[1:0]
2
O
Output for an external memory/page
selection control signal
67,
132,
237
ST
[2:0]
3
O
Internal status output
MCLK
SCKout
1 machine cycle
(Internal system
clock)
MOD2
MOD1
MOD0
Operating
mode
0
0
0
Single chip
mode
Other than above
Disabled
WMD1
SMD0
Wait
cycle
Can data be
rewritten
0
0
0 cyc
No
0
1
5 cyc
No
1
0
15 cyc
Yes
1
1
30 cyc
Yes
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