- 您现在的位置：买卖IC网 > PDF目录69018 > MB86605PMT SCSI BUS CONTROLLER, PQFP144 PDF资料下载
参数资料
| 型号： | MB86605PMT |
| 元件分类： | 总线控制器 |
| 英文描述： | SCSI BUS CONTROLLER, PQFP144 |
| 封装： | PLASTIC, LQFP-144 |
| 文件页数： | 2/64页 |
| 文件大小： | 275K |
| 代理商： | MB86605PMT |
第1页当前第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页
10
MB86605
(Continued)
3.
16-Bit Bus Mode – DMA Interface
(Continued)
Pin no.
Pin name
I/O
Function
51, 52, 55 to 57
A4 to A0
IU These are used to input addresses for selecting the Internal
registers.
46
RD (R/W)
I
In 80-series mode: This is used to input the read strobe signal for
reading data from the SPC to the MPU.
In 68-series mode: This is used to input the R/W control signal for
reading and writing data from the MPU to the
SPC.
44
WR (LDS)
I
In 80-series mode: This is used to input the write strobe signal for
writing data from the MPU to the SPC.
In 68-series mode: This is used to input the LDS signal output by
the MPU when the lower byte of the data bus
is valid.
42
BHE (UDS)
I
In 80-series mode: This is used to input the BHE signal output by
the MPU when the upper byte of the data bus
is valid.
In 68-series mode: This is used to input the UDS signal output by
the MPU when the upper byte of the data bus
is valid.
Pin no.
Pin name
I/O
Function
130
DREQ
O This is used to output DMA transfer request signals to the DMAC.
DMA data transfer between the SPC and memory is requested.
129
DACK
I
This is used to input DMA-enabling signals from the DMAC.
When the DMA enabling signal is active, DMA reading and writing
are executed.
138, 139, 141 to 144, 1, 3
136
DMD15 to 8
UDMDP
I/O Upper byte and parity of DMA data bus
When CS1 input valid: The MPU data bus is directly connected.
When 80-series mode: The 2nd data is input/output.
When 68-series mode: The 1st data is input/output.
4, 5, 7, 9 to 11, 13, 14
15
DMD7 to 0
LDMDP
I/O Lower byte and parity of DMA data bus
When CS1 input valid: The MPU data bus is directly connected.
When 80-series mode: The 1st data is input/output.
When 68-series mode: The 2nd data is input/output.
135
IORD
(DMR/W)
I
In 80-series mode: This is used to input the IORD or RD signal for
outputting data from the SPC to the DMA bus.
In 68-series mode: This is used to input the R/W control signal for
outputting and inputting data from the DMAC
to the SPC.
133
IOWR
(DMLDS)
I
In 80-series mode: This is used to input the IOWR or WR signal
for inputting data from the DMA bus to the
SPC.
In 68-series mode: This is used to input the LDS signal output by
the DMAC when the lower byte of the DMA
data bus is valid.
相关PDF资料 |
PDF描述 |
|---|---|
| MB86606PMT | SCSI BUS CONTROLLER, PQFP144 |
| MB86612 | 2 CHANNEL(S), 98.304M bps, SERIAL COMM CONTROLLER, PQFP100 |
| MB86703PF | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP80 |
| MB86831-66PFV-G | 32-BIT, 66 MHz, RISC PROCESSOR, PQFP176 |
| MB86832-80PFV-G | 32-BIT, 80 MHz, RISC PROCESSOR, PQFP176 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MB86606A | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:FAST-20 SCSI Protocol Controller |
| MB86606APMT2 | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:FAST-20 SCSI Protocol Controller |
| MB86612 | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:IEEE 1394 Bus Controller (for MPEG, DVC) |
| MB86612PBT | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:IEEE 1394 Bus Controller (for MPEG, DVC) |
| MB86612PFV | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:IEEE 1394 Bus Controller (for MPEG, DVC) |
发布紧急采购，3分钟左右您将得到回复。