参数资料
型号: MB89557APFT-XXX
厂商: FUJITSU LTD
元件分类: 微控制器/微处理器
英文描述: MICROCONTROLLER, PQFP100
封装: 12 X 12 MM, 1.20 MM, 0.40 MM PITCH, PLASTIC, TQFP-100
文件页数: 41/52页
文件大小: 1354K
代理商: MB89557APFT-XXX
MB89550A Series
46
DS07-12550-2E
■ MASK OPTIONS
*1 : This selection determines whether pins P66, P67, P70-P77 are used as I/O ports or as segment output pins.
If they are used as ports, then SEG22-SEG31 (Nch open drain) are not restricted by the condition for input
voltage to pins (VIN), namely that “VIN must be lower than the voltage at the V3 pin”.
*2 : This represents the initial value of the oscillator stabilization period select bit (SYCC : WT1, WT0) of the system
clock control register.
No.
Part No.
MB89557A
MB89558A
MB89P558A
MB89PV550A
Specifying procedure
Specify when
ordering mask
Specify at time of order
1
LCD drive power supply
Built-in step-up circuit
Built-in multiplier resistance
(for external connection)
Selectable
-201 built-in multiplier
resistance
-201 built-in multiplier
resistance
-202 built-in step-up
circuit
-202 built-in step-up
circuit
-203 built-in step-up
circuit
-203 built-in step-up
circuit
2
Port/segment selection*1
P66 (SEG22) , P67 (SEG23) ,
P70 (SEG24) , P71 (SEG25) ,
P72 (SEG26) , P73 (SEG27) ,
P74 (SEG28) , P75 (SEG29) ,
P76 (SEG30) , P77 (SEG31)
Selectable
-201 segment selected
(SEG22-SEG31 selected)
-201 segment selected
(SEG22-SEG31 selected)
-202 segment selected
(SEG22-SEG31 selected)
-202 segment selected
(SEG22-SEG31 selected)
-203 port selected
(P66, P67, P70-P77
selected)
-203 port selected
(P66, P67, P70-P77
selected)
3
Main clock
Initial value*2 selection for os-
cillator stabilization wait period
(Fch
= 12.5 MHz)
01 : 214/Fch
(approx. 1.31 ms)
10 : 217/Fch
(approx. 10.48 ms)
11 : 218/Fch
(approx. 20.97 ms)
Selectable
218/Fch
(approx. 20.97 ms)
218/Fch
(approx. 20.97 ms)
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