参数资料
型号: MB89P568PFV-101
元件分类: 微控制器/微处理器
英文描述: 8-BIT, OTPROM, 12.5 MHz, MICROCONTROLLER, PQFP80
封装: PLASTIC, LQFP-80
文件页数: 12/52页
文件大小: 1035K
代理商: MB89P568PFV-101
2
MB89560H Series
(Continued)
Three types of Serial Interface:
High Speed UART (Transfer rate from 300 to 192000 bps /10 MHz main clock)
8-bit Serial I/O (SIO)
UART/SIO
Two type of Programmable Pulse Generator(PPG) : 6-bit PPG and 12-bit PPG
Six types of timer
8 bit PWM 2 channels timers
8/16 bit timer/counter (8 bits x 2 channels or 16 bits x 1 channel)
21bit timebase timer
8 bit PWC timer operation
Watch prescaler(17 bits)
Watch-dog timer
I/O ports: max. 50 channels
External interrupt 1: 8 channels
External interrupt 2 (wake-up function): 4 channels
Low-power consumption modes (stop mode, sleep mode, and watch mode)
LQFP-80 and QFP-80 package
CMOS technology
s PRODUCT LINEUP
MB89567H
MB89567HC
MB89P568
MB89PV560
Classification
Mass production products
(mask ROM products)
OTP
Piggy-back
ROM size
32 K
× 8 bits
(internal mask ROM)
48 K
× 8 bits
(internal PROM)
56 K
× 8 bits
(external ROM)
RAM size
1K
× 8 bits
1K
× 8 bits
CPU functions
Number of instructions:
: 136
Instruction bit length:
: 8 bits
Instruction length:
: 1 to 3 bytes
Data bit length:
: 1, 8, 16 bits
Minimum execution time:
: 0.4
s/10 MHz
Minimum interrupt processing time:
: 3.6
s/10 MHz
Ports
General-purpose I/O ports (N-channel open drain)
: 20 pins (2 shared with I2C inputs, 16 shared
with LCD, 2 shared with other resources)
General-purpose I/O ports (CMOS)
: 30 pins (shared with resources)
Total
: 50 pins
21-bit timebase
timer
21 bits
Interrupt cycle: 211, 213, 216 or 220 tinst *5
Watchdog timer
Reset generate cycle: min. 220 tinst for main clock, min. 213 tinst for sub clock
Watch prescaler
17 bits
Interrupt cycle: 0.50s, 1.00s, 2.00s, 4.00s/32.768 KHz for subclock
8/16-bit timer/
counter
Can be operated either as a 2-channel 8-bit timer/counter (Timer 1 and Timer 2, each with its own
independent operating clock cycle), or as one 16-bit timer/counter
In Timer 1 or 16-bit timer/counter operation, event counter operation (external clock-triggered) and
square wave output capable
8-bit PWM 2 ch
timer
8-bit interval timer operation (square wave output capable, operating clock cycle: 1, 8, 16, 64 tinst)
8-bit resolution PWM operation (conversion cycle: 256 to 256 x 64 tinst)
8/16-bit timer/counter output for counter clock selectability
Part number
Parameter
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相关代理商/技术参数
参数描述
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